msx532 Fairchild Semiconductor, msx532 Datasheet - Page 13

• Manufacturer Part Number: msx532
• Description: 532 Port Digital Crosspoint Switch With Lvttl I/o S
• Manufacturer: Fairchild Semiconductor

Introduction
RCC[3]
RCC[2:1] Input/Output Select. These two bits are used to configure the I/O buffer as an input, output, input/output (bi-
RCC[0]
and
RCB[9]
RCB[8:7] Input Enable Select. These bits are used to assign a port one of the two available global input enable signals. An
RCB[6:5] Output Clock Source. These bits are used to select a clock source for a registered output port. Each I/O buffer
RCB[4:3] Input Clock Source. These bits are used to select a clock source for a registered input port. Each I/O buffer can
RCB[2]
RCB[1]
Signal
Invert Output. If an output port is programmed with this bit set to a one, the output of the port will be inverted. If
Inverted Input Clock. When this bit is set to a one, the registered input port’s selected clock source will be
Bus Repeater Enable. Setting this bit to a one enables the I/O buffer to operate in Bus Repeater Mode, a special
bi-directional mode. When zero the I/O buffer will not operate in Bus Repeater Mode.
When programming an I/O buffer to use Bus Repeater Mode, all of the other control bits must be set to zeroes.
Attempting to combine other I/O buffer options with Bus Repeater Mode may lead to unpredictable results.
directional mode), or no connect. When operating in bi-directional mode it is critical that the port be assigned
input and output enables so that it can be 3-STATED appropriately to avoid contention.
RCC[2:1]
Output Enable Select. These two bits are used to select from the two available active LOW global output
enables. The output will be allowed to drive when its assigned output enable is asserted. An output port will be 3-
STATED when its assigned output enable is de-asserted. When both output enables are selected, the two avail-
able active LOW output enable signals are AND’ed together to form the port’s combined output enable signal.
input port will drive into the crosspoint array when its assigned input enable is asserted. When both input
enables are selected, the two available input enable signals are OR’ed together to form the port’s combined
input enable signal.
RCB[8:7]
can select from one of two global clock inputs, or can use Next Neighbor Clocking. Next Neighbor Clocking uses
the signal on the next higher numbered port as a clock source. If no clock source is assigned to an output port, it
will operate in flow-through mode.
RCB[6:5]
select from one of two global clock inputs, or can use Next Neighbor Clocking. Next Neighbor Clocking uses the
signal on the next higher numbered port as a clock source. If no clock source is assigned to an input port, it will
operate in flow-through mode.
RCB[6:5]
00
01
10
11
this bit is zero, the output will not be inverted. Outputs may not be inverted when operating in Bus Repeater
Mode or in registered output mode.
inverted. When zero the input clock source will not be inverted.
RCC[0], RCB[9]
00
01
10
00
01
10
00
01
10
00
01
10
11
11
11
11
(Continued)
No Connect
Input
Output
Input / Output for Bi-Directional Mode
No Output Enable Selected
Output Enable 1
Output Enable 2
Both Output Enables
No Input Enable Selected
Input Enable 1
Input Enable 2
Both Input Enables
No Output Clock Source Selected
Output Clock Source 1
Output Clock Source 2
Next Neighbor Output Clock Source
Function
No Input Clock Source Selected
Input Clock Source 1
Input Clock Source 2
Next Neighbor Input Clock Source
Function
Function
Function
Function
TABLE 6. I/O Buffer Programming Commands
13
Description
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