hufa76413dk8 Fairchild Semiconductor, hufa76413dk8 Datasheet - Page 7

• Manufacturer Part Number: hufa76413dk8
• Description: Hufa76413dk8t N-channel Logic Level Ultrafet? Power Mosfet 60v, 4.8a, 56mohm
• Manufacturer: Fairchild Semiconductor

©2003 Fairchild Semiconductor Corporation
Thermal Resistance vs. Mounting Pad Area
The maximum rated junction temperature, T
thermal resistance of the heat dissipating path determines
the maximum allowable device power dissipation, P
application.
temperature, T
must be reviewed to ensure that T
Equation 1 mathematically represents the relationship and
serves as the basis for establishing the rating of the part.
In using surface mount devices such as the SO-8 package,
the environment in which it is applied will have a significant
influence on the part’s current and maximum power
dissipation ratings. Precise determination of P
and influenced by many factors:
1. Mounting pad area onto which the device is attached and
2. The number of copper layers and the thickness of the
3. The use of external heat sinks.
4. The use of thermal vias.
5. Air flow and board orientation.
6. For non steady state applications, the pulse width, the
Fairchild provides thermal information to assist the
designer’s preliminary application evaluation. Figure 22
defines the R
copper (component side) area. This is for a horizontally
positioned FR-4 board with 1oz copper after 1000 seconds
of steady state power with no air flow. This graph provides
the necessary information for calculation of the steady state
junction
applications can be evaluated using the Fairchild device
Spice thermal model or manually utilizing the normalized
maximum transient thermal impedance curve.
Thermal resistances corresponding to other copper areas
can be obtained from Figure 22 or by calculation using
Equation 2. The area, in square inches is the top copper
area including the gate and source pads.
The dual die SO-8 package introduces an additional thermal
coupling resistance, R
function of the top copper mouting pad area.
The thermal coupling resistance vs. copper area is also
graphically depicted in Figure 22.
R
R
P
whether there is copper on one side or both sides of the
board.
board.
duty cycle and the transient thermal response of the part,
the board and the environment they are in.
DM
JA
B
=
=
=
46.4 21.7
-----------------------------
temperature
T
103.2 24.3
JM
R
A
–
–
JA
JA
T
(
Therefore
–
o
A
for the device as a function of the top
C), and thermal resistance R
ln
B.
ln
Area
or
Area
Equation 3 describes R
the
power
application’s
JM
dissipation.
is never exceeded.
DM
JM
is complex
, and the
JA
(EQ. 1)
(EQ. 2)
(EQ. 3)
DM
ambient
(
B
o
, in an
Pulse
C/W)
as a
Figure 22. Thermal Resistance vs Mounting
300
250
200
150
100
50
0
0.001
R
R
JA
= 46.4 - 21.7
AREA, TOP COPPER AREA (in
= 103.2 - 24.3
0.01
228
Pad Area
*
ln
o
C/W - 0.006in
*
(AREA)
ln
(AREA)
191
2
o
C/W - 0.027in
0.1
2
) PER DIE
2
1
Rev. B