ht82a851r Holtek Semiconductor Inc., ht82a851r Datasheet - Page 9

• Manufacturer Part Number: ht82a851r
• Description: Ht82a851r -- Usb Audio Mcu
• Manufacturer: Holtek Semiconductor Inc.

interrupt requests may occur during this interval but only
the interrupt request flag is recorded. If a certain
interrupt requires servicing within the service routine,
the EMI bit and the corresponding bit of the INTC0 or
INTC1 may be set to allow interrupt nesting. If the stack
is full, the interrupt request will not be acknowledged,
even if the related interrupt is enabled, until the stack
pointer is decremented. If immediate service is desired,
the stack must be prevented from becoming full.
All these kinds of interrupts have a wake-up capability.
As an interrupt is serviced, a control transfer occurs by
pushing the program counter onto the stack, followed by
a branch to a subroutine at specified location in the
program memory. Only the program counter is pushed
onto the stack. If the contents of the register or status
register (STATUS) are altered by the interrupt service
program which corrupts the desired control sequence,
the contents should be saved in advance.
The USB interrupts are triggered by the following USB
events and the related interrupt request flag (USBF; bit
4 of the INTC0) will be set.
Rev. 1.20
Accessing the corresponding USB FIFO from the PC
The USB suspend signal from the PC
The USB resume signal from the PC
USB Reset signal
Bit No.
Bit No.
3, 7
0
1
2
3
4
5
6
7
0
1
2
4
5
6
EPLAYI
PLAYF
RECF
Label
USBF
Label
RECI
ET0I
ET1I
ESII
EMI
T0F
T1F
EUI
SIF
Controls the master (global) interrupt (1=enable; 0=disable)
Controls the USB interrupt (1=enable; 0=disable)
Controls the Timer/Event Counter 0 interrupt (1=enable; 0=disable)
Controls the Timer/Event Counter 1 interrupt (1=enable; 0=disable)
USB interrupt request flag (1=active; 0=inactive)
Internal Timer/Event Counter 0 request flag (1=active; 0=inactive)
Internal Timer/Event Counter 1 request flag (1=active; 0=inactive)
Unused bit, read as 0
Play interrupt (1=enable; 0=disable)
Control Serial interface interrupt (1=enable; 0=disable)
Record interrupt (1=enable; 0=disable)
Unused bit, read as 0
Play interrupt request flag (1=active; 0=inactive)
Serial interface interrupt request flag (1=active; 0=inactive)
Record interrupt request flag (1=active; 0=inactive)
INTC0 (0BH) Register
INTC1 (1EH) Register
9
When the interrupt is enabled, the stack is not full and
the USB interrupt is active, a subroutine call to location
04H will occur. The interrupt request flag (USBF) and
EMI bits will be cleared to disable other interrupts.
When the PC Host accesses the FIFO of the
HT82A851R, the corresponding request bit of the USR
is set, and a USB interrupt is triggered. So the user can
easily determine which FIFO has been accessed. When
the interrupt has been served, the corresponding bit
should be cleared by firmware. When the HT82A851R
receives a USB Suspend signal from the Host PC, the
suspend line (bit0 of USC) of the HT82A851R is set and
a USB interrupt is also triggered.
Also when the HT82A851R receives a Resume signal
from the Host PC, the resume line (bit3 of USC) of the
HT82A851R is set and a USB interrupt is triggered.
The internal Timer/Event Counter 0 interrupt is
initialized by setting the Timer/Event Counter 0 interrupt
request flag (bit 5 of INTC0), caused by a timer 0
overflow. When the interrupt is enabled, the stack is not
full and the T0F bit is set, a subroutine call to location
08H will occur. The related interrupt request flag (T0F)
will be reset and the EMI bit cleared to disable further
interrupts.
Function
Function
HT82A851R
June 15, 2007