ht82a851r Holtek Semiconductor Inc., ht82a851r Datasheet - Page 8

• Manufacturer Part Number: ht82a851r
• Description: Ht82a851r -- Usb Audio Mcu
• Manufacturer: Holtek Semiconductor Inc.

Indirect Addressing Register
Locations 00H and 02H are the indirect addressing
registers, however they are not physically implemented.
Any read/write operation to [00H] or [02H] will access
the data memory pointed to by MP0 and MP1. Reading
location 00H or 02H indirectly will return a result of 00H.
Writing indirectly results in no operation.
Data transfer between two indirect addressing registers
is not supported. The memory pointer registers, MP0
and MP1, are 8-bit registers which are used to access
the Data Memory in combination with indirect
addressing registers.
Bank Pointer
The bank pointer is used to select the required Data
Memory bank. If Data Memory bank 0 is to be selected,
then a 0 should be loaded into the BP register. Data
Memory locations before 40H in any bank are
overlapped.
Accumulator
The accumulator is closely related to ALU operations. It
is also mapped to location 05H of the data memory and
can carry out immediate data operations. The data
movement between two data memory locations must
pass through the accumulator.
Arithmetic and Logic Unit - ALU
This circuit performs 8-bit arithmetic and logic
operations. The ALU provides the following functions:
The ALU not only saves the results of a data operation
but also changes the status register.
Rev. 1.20
Arithmetic operations - ADD, ADC, SUB, SBC, DAA
Logic operations - AND, OR, XOR, CPL
Rotation - RL, RR, RLC, RRC
Increment and Decrement - INC, DEC
Branch decision - SZ, SNZ, SIZ, SDZ ....
Bit No.
6~7
0
1
2
3
4
5
Label
PDF
OV
AC
TO
C
Z
C is set if an operation results in a carry during an addition operation or if a borrow does not
take place during a subtraction operation; otherwise C is cleared. C is also affected by a rotate
through carry instruction.
AC is set if an operation results in a carry out of the low nibbles in addition or no borrow from
the high nibble into the low nibble in subtraction; otherwise AC is cleared.
Z is set if the result of an arithmetic or logic operation is zero; otherwise Z is cleared.
OV is set if an operation results in a carry into the highest-order bit but not a carry out of the
highest-order bit, or vice versa; otherwise OV is cleared.
PDF is cleared by a system power-up or executing the CLR WDT instruction.
PDF is set by executing the HALT instruction.
TO is cleared by a system power-up or executing the CLR WDT or HALT instruction.
TO is set by a WDT time-out.
Unused bit, read as 0
Status (0AH) Register
8
Status Register - STATUS
This 8-bit register contains the zero flag (Z), carry flag
(C), auxiliary carry flag (AC), overflow flag (OV), power
down flag (PDF), and watchdog time-out flag (TO). It
also records the status information and controls the
operation sequence.
With the exception of the TO and PDF flags, bits in the
status register can be altered by instructions like most
other registers. Any data written into the status register
will not change the TO or PDF flag. In addition,
operations related to the status register may give
different results from those intended.
The TO flag can be affected only by a system power-up,
a WDT time-out or executing the CLR WDT or HALT
instruction. The PDF flag can be affected only by
executing the HALT or CLR WDT instruction or
during a system power-up.
The Z, OV, AC and C flags generally reflect the status of
the latest operations.
In addition, upon entering the interrupt sequence or exe-
cuting a subroutine call, the status register will not be
automatically pushed onto the stack. If the contents of
the status are important and if the subroutine can cor-
rupt the status register, precautions must be taken to
save it properly.
Interrupt
The device provides a USB interrupt, internal
timer/event counter interrupts, play/record data valid
interrupt and a serial interface interrupt. The Interrupt
Control Register0 (INTC0;0BH) and the interrupt control
register1 (INTC1;1EH) both contain the interrupt control
bits that are used to set the enable/disable status and
interrupt request flags.
Once an interrupt subroutine is serviced, all the other
interrupts will be blocked (by clearing the EMI bit). This
scheme may prevent any further interrupt nesting. Other
Function
HT82A851R
June 15, 2007