spear-09-p022 STMicroelectronics, spear-09-p022 Datasheet - Page 25

• Manufacturer Part Number: spear-09-p022
• Description: Spear?? Plus600 Dual Processor Cores
• Manufacturer: STMicroelectronics

SPEAR-09-P022
4
4.1
4.1.1
4.1.2
Main Blocks
7.1 CPU subsystem
Overview
Each CPU sub-system includes the following blocks:
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CPU ARM 926EJ-S
The processor is the powerful ARM926EJ-S, targeted for multi-tasking applications.
Belonging to ARM9 general purposes family microprocessor, it principally stands out for the
Memory Management Unit, which provides virtually memory features, making it also
compliant with WindowsCE, Linux and SymbianOS operating systems.
The ARM926EJ-S supports the 32 bit ARM and 16 bit Thumb instruction sets, enabling the
user to trade off between high performance and high code density and includes features for
efficient execution of Java byte codes.
Besides, it has the ARM debug architecture and includes logic to assist in software debug.
Its main features are:
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ARM 926EJS
Two timer channels
One GPIO block (8 I/O lines)
Two Interrupt Controller (32 IRQ lines)
CORE f
Memory Management Unit
16 KB of instruction CACHE
16 KB of data CACHE
Configurable Tightly Coupled Memory (I/D) size trough the configurable logic array
ARM-V5TEJ instructions set architecture:
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AMBA Bus interface
Coprocessor interface (Only for the 1
EmbeddedICE-RT
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ETM9 (Embedded Trace Macro-cell)
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ARM (32 bit), Thumb
DSP extensions
JAVA™ (8 bit) instructions
Single mode (two connectors)
Two processor daisy chained
Single ETM mode (single or double packet configurable)
Dual ETM mode (both processors ETM are available in single packet mode)
MAX
333 MHz independent programmable for each CPU
®
(16 bit)
st
processor)
Main Blocks
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