xr17l152im Exar Corporation, xr17l152im Datasheet - Page 8

• Manufacturer Part Number: xr17l152im
• Description: 3.3v Pci Bus Dual Uart
• Manufacturer: Exar Corporation

áç
áç
áç
áç
DISCONTINUED
A
0x18h
DDRESS
0x0C
0x1C
0x2C
0x04
0x08
0x10
0x14
0x20
0x24
0x28
0x30
31
30
29:28
27
26:25
24
23
22:16
15:9,7,
5,4,3,2
8
6
1
0
31:8
7:0
31:24
23:16
15:8
7:0
31:10
9:0
31:0
31:0
31:0
31:0
31:0
31:0
31:16
15:0
31:0
B
ITS
R-Reset
RWR
RWR
RWC
RWC
RWR
RWR
RWR
RWR
T
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
T
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
YPE
ABLE
1
1
1: PCI L
Parity error detected. Cleared by writing a logic 1.
System error detected. Cleared by writing a logic 1.
Unused
Target Abort. Set whenever L152 terminates with a target abort.
DEVSEL# timing.
Unimplemented bus master error reporting bit
Fast back to back transactions are supported
Reserved Status bits
Command bits (reserved)
SERR# driver enable. Logic 1=enable driver and 0=disable driver
Parity error enable. Logic 1=respond to parity error and 0=ignore
Command controls a device’s response to mem space accesses:
0=disable mem space accesses, 1=enable mem space accesses
Command controls a device’s response to I/O space accesses:
0 = disable I/O space accesses 1 = enable I/O space accesses
Class Code (Simple 550 Communication Controller).
Revision ID (Exar device revision number)
BIST (Built-in Self Test)
Header Type (a single function device with one BAR)
Unimplemented Latency Timer (needed only for bus master)
Unimplemented Cache Line Size
Memory Base Address Register (BAR)
Claims a 1K address space for the memory mapped UARTs
Unimplemented Base Address Register (returns zeros)
Unimplemented Base Address Register (returns zeros)
Unimplemented Base Address Register (returns zeros)
Unimplemented Base Address Register (returns zeros)
Unimplemented Base Address Register (returns zeros)
Reserved
Subsystem ID (write from external EEPROM by customer)
Subsystem Vendor ID (write from external EEPROM by cus-
tomer)
Expansion ROM Base Address (Unimplemented)
OCAL
B
US
C
ONFIGURATION
8
D
ESCRIPTION
S
PACE
R
EGISTERS
3.3V PCI BUS DUAL UART
00 0000 0000
R
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00 00 00
ESET
0x070002
000 0000
0x0000
0x0000
0x0000
XR17L152
(
0000
0x00
0x01
0x00
0x00
0x00
HEX
00
0
0
1
0
0
0
0
REV. 1.1.0
V
ALUE
)