xr17l152im Exar Corporation, xr17l152im Datasheet - Page 3

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xr17l152im

Manufacturer Part Number
xr17l152im
Description
3.3v Pci Bus Dual Uart
Manufacturer
Exar Corporation
Datasheet
XR17L152
3.3V PCI BUS DUAL UART
REV. 1.1.0
PIN DESCRIPTIONS
PCI LOCAL BUS INTERFACE
MODEM OR SERIAL I/O INTERFACE
AD31-AD0
C/BE3#
DEVSEL#
FRAME#
STOP#
PERR#
SERR#
TRDY#
CTS0#
DTR0#
RTS0#
IRDY#
IDSEL
INTA#
RST#
N
BE0#
CLK
PAR
RX0
TX0
AME
-
C/
24-31, 35-42
90-97, 2-9,
98, 12,
21, 34
P
86
87
13
14
15
17
99
16
85
20
18
19
73
66
71
67
72
IN
#
T
OD
OD
I/O
I/O
YPE
O
O
O
O
O
O
O
I
I
I
I
I
I
I
I
Bus reset input (active low). It resets the PCI local bus configuration space
registers, device configuration registers and UART channel registers to the
default condition, see
Bus clock input of up to 33MHz at 3.3V.
Address data lines [31:0] (bidirectional).
Bus transaction cycle frame (active low). It indicates the beginning and dura-
tion of an access.
Bus Command/Byte Enable [3:0] (active low). This line is multiplexed for bus
Command during the address phase and Byte Enables during the data
phase.
Initiator Ready (active low). During a write, it indicates that valid data is
present on data bus. During a read, it indicates the master is ready to accept
data.
Target Ready (active low).
Target request to stop current transaction (active low).
Initialization device select (active high).
Device select to the XR17L152 (active low).
Device interrupt from XR17L152 (open drain, active low).
Parity is even across AD[31:0] and C/BE[3:0]#. (bidirectional, active high).
Data Parity error indicator, except for Special Cycle transactions (active low).
Optional in bus target application.
System error indicator, Address parity or Data parity during Special Cycle
transactions (open drain, active low). Optional in bus target application.
UART channel 0 Transmit Data or infrared transmit data. Normal TXD output
idles at logic 1 condition while infrared TXD output idles at a logic 0 condition.
UART channel 0 Receive Data or infrared receive data. Normal RXD input
idles at logic 1 condition while infrared RXD input idles at a logic 0 condition.
In the infrared mode, the polarity of the incoming RXD signal can be selected
via FCTR bit-4. If this bit is a logic 0, logic 0 on the RXD input is considered a
mark and if this bit is a logic 1, a logic 0 on the RXD input is considered a
space.
UART channel 0 Request to Send or general purpose output (active low). If
this output is not used, leave it unconnected.
UART channel 0 Clear to Send or general purpose input (active low). This
input should be connected to VCC when not used.
UART channel 0 Data Terminal Ready or general purpose output (active low).
If this output is not used, leave it unconnected.
3
Table 18
.
D
ESCRIPTION
DISCONTINUED
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