xr17l152im Exar Corporation, xr17l152im Datasheet - Page 17

• Manufacturer Part Number: xr17l152im
• Description: 3.3v Pci Bus Dual Uart
• Manufacturer: Exar Corporation

XR17L152
3.3V PCI BUS DUAL UART
REV. 1.1.0
MPIOINT [7:0] (default 0x00)
Enable multipurpose input pin interrupt. If the pin is selected by MPIOSEL as input then bit-0 enables input pin
0 for interrupt, and bit-7 enables input pin 7. No interrupt is enable if the pin is selected to be an output. The
interrupt is edge sensing and determined by MPIOINV and MPIOLVL registers. The MPIO interrupt clears after
a read to register MPIOLVL. The combination of MPIOLVL and MPIOINV determines the interrupt being active
low or active high, it’s level trigger. Logic 0 (default) disables the pin’s interrupt and logic 1 enables it.
MPIOLVL [7:0] (default 0x00)
Output pin level control and input level status. The status of the input pin(s) is read on this register and output
pins are controlled on this register. A logic 0 (default) sets the output to low and a logic 1 sets the output pin to
high. The MPIO interrupt will clear upon reading this register.
MPIO3T [7:0] (default 0x00)
Output pin three-state control. A logic 0 (default) sets the output to active level per register MPIOBIT settling, a
logic 1 sets the output pin to tri-state.
MPIOINV [7:0] (default 0x00)
Input inversion control. A logic 0 (default) does not invert the input pin logic. A logic 1 inverts the input logic
level.
M P IO 7
B it-7 B it-6 B it-5 B it-4 B it-3 B it-2 B it-1 B it-0
B it-7 B it-6 B it-5 B it-4 B it-3 B it-2 B it-1 B it-0
M P IO 7
B it-7 B it-6 B it-5 B it-4 B it-3 B it-2 B it-1 B it-0
M P IO 7
B it-7 B it-6 B it-5 B it-4 B it-3 B it-2 B it-1 B it-0
M P IO 7
M ultipurpose Input S ignal Inversion E nable
M ultipu rpo se Inp ut/O u tpu t In terrup t E n ab le
M P IO 6
M ultipurpose O utput Level C ontrol
M P IO 6
M P IO 6
M P IO 6
M ultipurpose O utput 3-state E n able
M P IO 5 M P IO 4 M P IO 3 M P IO 2 M P IO 1 M P IO 0
M P IO 5 M P IO 4 M P IO 3 M P IO 2 M P IO 1 M P IO 0
M P IO 5 M P IO 4 M P IO 3 M P IO 2 M P IO 1 M P IO 0
M P IO 5 M P IO 4 M P IO 3 M P IO 2 M P IO 1 M P IO 0
M PIO L VL R egister
M PIO INV Register
M PIO IN T R egister
M PIO 3T Register
17
DISCONTINUED
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