lf3370 LOGIC Devices Incorporated, lf3370 Datasheet - Page 4

• Manufacturer Part Number: lf3370
• Description: High-definition Video Format Converter
• Manufacturer: LOGIC Devices Incorporated

DEVICES INCORPORATED
SIGNAL DEFINITIONS
Power
V
+3.3 V power supply. All power pins
must be connected.
Clock
CLK — Master Clock
The rising edge of CLK strobes all
enabled registers. To guarantee data
integrity, a minimum of 25KHz must
be maintained.
Inputs
A
A
13-bit registered data input ports.
Data is latched on the rising edge of
CLK.
CF
CF
Colorspace/Key Scaler coefficient
banks, Round/Select/Limit registers,
and Configuration registers. Data
present on CF
LF Interface
CLK when LD is LOW.
CA
CA
user-programmable Colorspace/Key
Scaler Coefficients are used.
Outputs
W
W
13-bit registered data output ports.
Outputs are updated on the rising
edge of CLK.
CC
12-0
12-0
12-0
12-0
12-0
12-0
1-0
1-0
and GND
, B
, B
, X
, X
— Coefficient Address
determines which of the four
— Coefficient Input
is used to address and load
12-0
12-0
12-0
12-0
, C
, C
, Y
, Y
TM
12-0,
12-0
12-0
12-0
12-0
on the rising edge of
, and D
, Z
, and Z
is latched into the
D
12-0
12-0
— Data Inputs
— Data Outputs
12-0
12-0
are the
are the
HF
HF
flags used to indicate when a 20-bit
counter reaches its user-defined
terminal count; a HIGH to LOW
transition of HBLANK and/or RESET
will reset the flags.
Controls
LD — Configuration Load
When LD is LOW, data on CF
latched into the LF3370 LF Interface
on the rising edge of CLK. When LD
is HIGH, data is not loaded into
the LF Interface
the LF Interface
latched HIGH to LOW transition of
LD is required in order for the input
circuitry to function properly.
Therefore, LD must be set HIGH
immediately after power up to
ensure proper operation of the input
circuitry.
SYNC
SYNC control signal is required to
properly synchronize the input
demultiplexer, output multiplexer,
and halfband filters to the data
flowing through the LF3370. A
latched HIGH to LOW transition tells
the core which sample corresponds to
a Cb/Cr sample for proper de-multi-
plexing and multiplexing. This signal
will also synchronize the half-band
filters into a decimation/interpolation
sequence. This signal is latched on the
rising edge of CLK.
DATAPASS
DATAPASS is used to place the
LF3370 in a mode of operation that
allows the user to pass data through
the core (Input/Output Bias Adders,
LUTs, Hafband Interpolator/
Decimator, Colorspace/Key Scaler)
without any processing. This signal is
latched on the rising edge of CLK.
1
1
/HF
and HF
— Synchronization for data alignment
0
— HBlank Flags
0
— Datapass Mode
are two general purpose
TM
TM
4
. When enabling
for data input, a
High-Definition Video Format Converter
12-0
is
TM
HBLANK
HBLANK is used for data replacement
corresponding to user-selectable
blanking levels. A HIGH to LOW
transition resets the counter and the
HFx flags.This signal is latched on the
rising edge of CLK.
INBIAS
INBIAS
four user-programmable Input Bias
registers are used to sum with the
input data. These pins are latched on
the rising edge of CLK.
OUTBIAS
OUTBIAS
four user-programmable Output Bias
registers are used to sum with the
output data.These pins are latched on
the rising edge of CLK.
RSL
RSL
programmable Round/Select/Limit
registers (RSL registers) are used in
the RSL circuitry. A value of 00 on
RSL
of 01 selects RSL register 1 and so on.
RSL
CLK.
OE — Output Enable
When OE is LOW,
and Z
When OE is HIGH,
and Z
impedance state.
PAUSE — LF Interface
When PAUSE is HIGH, the LF3370
LF Interface
halted until PAUSE is returned to a
LOW state. This effectively allows
the user to load coefficients and
control registers at a slower rate than
the master clock.
Video Imaging Products
1-0
1-0
1-0
1-0
12-0
12-0
— Round/Select/Limit Control
is latched on the rising edge of
determines which of the user-
selects RSL register 0. A value
1-0
1-0
— Horizontal Blanking Control
1-0
are enabled for output.
are placed in a high-
1-0
— Input Bias Control
determines which of the
TM
— Output Bias Control
determines which of the
loading sequence is
This pin is latched
W
W
12-0
TM
12-0
03/13/2001–LDS.3370-F
, X
Pause
, X
12-0
LF3370
12-0
, Y
, Y
12-0
12-0
,
,