mc9s12uf32 Freescale Semiconductor, Inc, mc9s12uf32 Datasheet - Page 77

• Manufacturer Part Number: mc9s12uf32
• Description: System Chip Guide V01.05
• Manufacturer: Freescale Semiconductor, Inc

Section 3 System Clock Description
The clock is generated by the USB20PHY analog sub-block in the USB20D6E2F module.The Clock and
Reset Generator distributes the internal clock signals for the core and all peripheral modules. Figure
3-1shows the clock connections from the CRG_U to all modules. Consult the CRG_U Block Guide for
details on clock generation.
.
Freescale Semiconductor
NOTES:
1. UTMI clock and IQUE clock are fixed 30MHz and 60MHz respectively only when PHY (instead of OSC) is selected as the
clock source. See CRG_U Block Guide for details.
EXTAL clock
EXTAL
XTAL
CRG_U
OSC
IP bus clock
core clock
oscillator clock
UTMI Clock*
IQUE Clock*
Figure 3-1 Clock Connections
SMRAM3P5K2E
30MHz Clock for UTMI Interface
60MHz Clock
S12_CORE
ATA5HC
USB2.0
System on a Chip Guide — 9S12UF32DGV1/D V01.05
Digital
SMHC
MSHC
SDHC
CFHC
Flash
IQUE
PIM
SCI
TIM
1
USB2.0
PHY
77