lpc1114fn28/102 NXP Semiconductors, lpc1114fn28/102 Datasheet - Page 42

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lpc1114fn28/102

Manufacturer Part Number
lpc1114fn28/102
Description
32-bit Arm Cortex-m0 Microcontroller; Up To 32 Kb Flash And 8 Kb Sram
Manufacturer
NXP Semiconductors
Datasheet
NXP Semiconductors
[1]
Table 11.
T
[1]
[2]
[4]
[5]
LPC1110_11_12_13_14
Product data sheet
[2]
[3]
[4]
[5]
[6]
[7]
[8]
[9]
[10] Low-current mode PWR_LOW_CURRENT selected when running the set_power routine in the power profiles.
[11] Including voltage on outputs in 3-state mode.
[12] V
[13] 3-state outputs go into 3-state mode in Deep power-down mode.
[14] Allowed as long as the current limit does not exceed the maximum current allowed by the device.
[15] To V
[3]
[6]
[7]
[8]
Symbol
V
C
E
E
E
E
E
R
R
amb
IA
D
L(adj)
O
G
T
ia
vsi
i
Typical ratings are not guaranteed. The values listed are at room temperature (25 C), nominal supply voltages.
T
I
IRC enabled; system oscillator disabled; system PLL disabled.
BOD disabled.
All peripherals disabled in the SYSAHBCLKCTRL register. Peripheral clocks to UART and SPI0/1 disabled in system configuration
block.
IRC disabled; system oscillator enabled; system PLL enabled.
All oscillators and analog blocks turned off in the PDSLEEPCFG register; PDSLEEPCFG = 0x0000 18FF.
WAKEUP pin pulled HIGH externally.
The ADC is monotonic, there are no missing codes.
The differential linearity error (E
The integral non-linearity (E
appropriate adjustment of gain and offset errors. See
The offset error (E
ideal curve. See
The gain error (E
error, and the straight line which fits the ideal transfer curve. See
The absolute error (E
ADC and the ideal transfer curve. See
T
Input resistance R
DD
= 40 C to +85 C unless otherwise specified; ADC frequency 4.5 MHz, V
amb
amb
DD
measurements were performed with all pins configured as GPIO outputs driven LOW and pull-up resistors disabled.
SS
supply voltage must be present.
= 25 C.
= 25 C; maximum sampling frequency f
.
ADC static characteristics
Parameter
analog input voltage
analog input capacitance
differential linearity error
integral non-linearity
offset error
gain error
absolute error
voltage source interface
resistance
input resistance
Figure
G
i
O
) is the relative difference in percent between the straight line fitting the actual transfer curve after removing offset
depends on the sampling frequency f
) is the absolute difference between the straight line which fits the actual curve and the straight line which fits the
T
) is the maximum difference between the center of the steps of the actual transfer curve of the non-calibrated
11.
L(adj)
D
) is the peak difference between the center of the steps of the actual and the ideal transfer curve after
) is the difference between the actual step width and the ideal step width. See
Figure
All information provided in this document is subject to legal disclaimers.
Conditions
s
11.
= 400 kSamples/s and analog input capacitance C
Rev. 6 — 2 November 2011
Figure
s
: R
i
11.
= 1 / (f
Figure
s
 C
11.
ia
).
[1][2]
[7][8]
[3]
[4]
[5]
[6]
LPC1110/11/12/13/14
Min
0
-
-
-
-
-
-
-
-
32-bit ARM Cortex-M0 microcontroller
DD
= 2.5 V to 3.6 V.
Typ
-
-
-
-
-
-
-
-
-
ia
= 1 pF.
Max
V
1
 1
 1.5
 3.5
0.6
 4
40
2.5
Figure
© NXP B.V. 2011. All rights reserved.
DD
11.
Unit
V
pF
LSB
LSB
LSB
%
LSB
k
M
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