lpc1114fn28/102 NXP Semiconductors, lpc1114fn28/102 Datasheet - Page 2

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lpc1114fn28/102

Manufacturer Part Number
lpc1114fn28/102
Description
32-bit Arm Cortex-m0 Microcontroller; Up To 32 Kb Flash And 8 Kb Sram
Manufacturer
NXP Semiconductors
Datasheet
NXP Semiconductors
3. Applications
LPC1110_11_12_13_14
Product data sheet
Analog peripherals:
Serial interfaces:
Clock generation:
Power control:
Unique device serial number for identification.
Single power supply (1.8 V to 3.6 V).
Available as LQFP48 package and HVQFN33 package (LPC1100 and LPC1100L
series).
LPC1100L series available as TSSOP28 package, DIP28 package, TSSOP20
package, and SO20 package.
eMetering
Alarm systems
Four general purpose counter/timers with up to four capture inputs and up to 13
match outputs.
Programmable WatchDog Timer (WDT).
Programmable windowed WDT on LPC111x/002/102/202/302 only.
10-bit ADC with input multiplexing among 5, 6, or 8 pins depending on package
size.
UART with fractional baud rate generation, internal FIFO, and RS-485 support.
Two SPI controllers with SSP features and with FIFO and multi-protocol
capabilities (second SPI on LQFP48 package only).
I
data rate of 1 Mbit/s with multiple address recognition and monitor mode (not on
LPC1112FDH20/102).
12 MHz internal RC oscillator trimmed to 1 % accuracy that can optionally be used
as a system clock.
Crystal oscillator with an operating range of 1 MHz to 25 MHz.
Programmable watchdog oscillator with a frequency range of 7.8 kHz to 1.8 MHz.
PLL allows CPU operation up to the maximum CPU rate without the need for a
high-frequency crystal. May be run from the system oscillator or the internal RC
oscillator.
Clock output function with divider that can reflect the system oscillator clock, IRC
clock, CPU clock, and the Watchdog clock.
Integrated PMU (Power Management Unit) to minimize power consumption during
Sleep, Deep-sleep, and Deep power-down modes.
Power profiles residing in boot ROM allowing to optimize performance and
minimize power consumption for any given application through one simple function
call. (LPC1100L series, on LPC111x/002/102/202/302 only.)
Three reduced power modes: Sleep, Deep-sleep, and Deep power-down.
Processor wake-up from Deep-sleep mode via a dedicated start logic using up to
13 of the functional pins.
Power-On Reset (POR).
Brownout detect with four separate thresholds for interrupt and forced reset.
2
C-bus interface supporting full I
All information provided in this document is subject to legal disclaimers.
Rev. 6 — 2 November 2011
2
C-bus specification and Fast-mode Plus with a
LPC1110/11/12/13/14
Lighting
White goods
32-bit ARM Cortex-M0 microcontroller
© NXP B.V. 2011. All rights reserved.
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