atmega3250v-8auatmega325v-8ai ATMEL Corporation, atmega3250v-8auatmega325v-8ai Datasheet - Page 74

• Manufacturer Part Number: atmega3250v-8auatmega325v-8ai
• Description: Atmega3250 8-bit Microcontroller With In-system Programmable Flash
• Manufacturer: ATMEL Corporation

74
ATmega325/3250/645/6450
• TDO, ADC6 – Port F, Bit 6
ADC6, Analog to Digital Converter, Channel 6
TDO, JTAG Test Data Out: Serial output data from Instruction Register or Data Register. When
the JTAG interface is enabled, this pin can not be used as an I/O pin. In TAP states that shift out
data, the TDO pin drives actively. In other states the pin is pulled high.
• TMS, ADC5 – Port F, Bit 5
ADC5, Analog to Digital Converter, Channel 5
TMS, JTAG Test mode Select: This pin is used for navigating through the TAP-controller state
machine. When the JTAG interface is enabled, this pin can not be used as an I/O pin.
• TCK, ADC4 – Port F, Bit 4
ADC4, Analog to Digital Converter, Channel 4
TCK, JTAG Test Clock: JTAG operation is synchronous to TCK. When the JTAG interface is
enabled, this pin can not be used as an I/O pin.
• ADC3 - ADC0 – Port F, Bit 3:0
Analog to Digital Converter, Channel 3-0.
Table 14-12. Overriding Signals for Alternate Functions in PF7:PF4
Signal
Name
PUOE
PUOV
DDOE
DDOV
PVOE
PVOV
PTOE
DIEOE
DIEOV
DI
AIO
PF7/ADC7/TDI
JTAGEN
1
JTAGEN
0
0
0
–
JTAGEN
0
–
TDI
ADC7 INPUT
PF6/ADC6/TDO
JTAGEN
1
JTAGEN
SHIFT_IR +
SHIFT_DR
JTAGEN
TDO
–
JTAGEN
0
–
ADC6 INPUT
.
.
.
PF5/ADC5/TMS
JTAGEN
1
JTAGEN
0
0
0
–
JTAGEN
0
–
TMS
ADC5 INPUT
PF4/ADC4/TCK
1
JTAGEN
0
0
0
–
JTAGEN
0
–
TCK
ADC4 INPUT
JTAGEN
2570L–AVR–08/07