atmega3250v-8auatmega325v-8ai ATMEL Corporation, atmega3250v-8auatmega325v-8ai Datasheet - Page 44
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atmega3250v-8auatmega325v-8ai
Manufacturer Part Number
atmega3250v-8auatmega325v-8ai
Description
Atmega3250 8-bit Microcontroller With In-system Programmable Flash
Manufacturer
ATMEL Corporation
Datasheet
1.ATMEGA3250V-8AUATMEGA325V-8AI.pdf
(362 pages)
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11.8
44
Watchdog Timer
ATmega325/3250/645/6450
Thus, when the BOD is not enabled, after setting the ACBG bit or enabling the ADC, the user
must always allow the reference to start up before the output from the Analog Comparator or
ADC is used. To reduce power consumption in Power-down mode, the user can avoid the three
conditions above to ensure that the reference is turned off before entering Power-down mode.
The Watchdog Timer is clocked from a separate On-chip Oscillator which runs at 1 MHz. This is
the typical value at V
controlling the Watchdog Timer prescaler, the Watchdog Reset interval can be adjusted as
shown in
dog Timer. The Watchdog Timer is also reset when it is disabled and when a Chip Reset occurs.
Eight different clock cycle periods can be selected to determine the reset period. If the reset
period expires without another Watchdog Reset, the ATmega325/3250/645/6450 resets and
executes from the Reset Vector. For timing details on the Watchdog Reset, refer to
on page
To prevent unintentional disabling of the Watchdog or unintentional change of time-out period,
two different safety levels are selected by the fuse WDTON as shown in Table 11-1. Refer to
“Timed Sequences for Changing the Configuration of the Watchdog Timer” on page 45
details.
Table 11-1.
Figure 11-7. Watchdog Timer
WDTON
Unprogrammed
Programmed
45.
Table 11-2 on page
WDT Configuration as a Function of the Fuse Settings of WDTON
Safety
Level
CC
1
2
= 5V. See characterization data for typical values at other V
OSCILLATOR
WATCHDOG
WDT Initial
State
Disabled
Enabled
45. The WDR – Watchdog Reset – instruction resets the Watch-
How to Disable the
WDT
Timed sequence
Always enabled
How to Change
Time-out
Timed sequence
Timed sequence
2570L–AVR–08/07
CC
Table 11-2
levels. By
for
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