atmega3250v-8auatmega325v-8ai ATMEL Corporation, atmega3250v-8auatmega325v-8ai Datasheet - Page 283

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atmega3250v-8auatmega325v-8ai

Manufacturer Part Number
atmega3250v-8auatmega325v-8ai
Description
Atmega3250 8-bit Microcontroller With In-system Programmable Flash
Manufacturer
ATMEL Corporation
Figure 27-12. Serial Programming Instruction example
27.7.4
27.8
2570L–AVR–08/07
Byte 1
Programming via the JTAG Interface
SPI Serial Programming Characteristics
Load Program Memory Page (High/Low Byte)/
Load EEPROM Memory Page (page access)
Bit 15 B
Byte 2
Adr M M S S B
A
For characteristics of the SPI module see “SPI Timing Characteristics” on page 301.
Programming through the JTAG interface requires control of the four JTAG specific pins: TCK,
TMS, TDI, and TDO. Control of the reset and clock pins is not required.
To be able to use the JTAG interface, the JTAGEN Fuse must be programmed. The device is
default shipped with the fuse programmed. In addition, the JTD bit in MCUCSR must be cleared.
Alternatively, if the JTD bit is set, the external reset can be forced low. Then, the JTD bit will be
cleared after two chip clocks, and the JTAG pins are available for programming. This provides a
means of using the JTAG pins as normal port pins in Running mode while still allowing In-Sys-
tem Programming via the JTAG interface. Note that this technique can not be used when using
the JTAG pins for Boundary-scan or On-chip Debug. In these cases the JTAG pins must be ded-
icated for this purpose.
During programming the clock frequency of the TCK Input must be less than the maximum fre-
quency of the chip. The System Clock Prescaler can not be used to divide the TCK Clock Input
into a sufficiently low frequency.
As a definition in this data sheet, the LSB is shifted in and out first of all Shift Registers.
Byte 3
Adr LSB
Page Offset
0
Serial Programming Instruction
Byte 4
Program Memory/
EEPROM Memory
Page Buffer
Page N-1
Page 0
Page 1
Page 2
Byte 1
ATmega325/3250/645/6450
Page Number
Bit 15 B
Byte 2
Write Program Memory Page/
Write EEPROM Memory Page
Adr MSB
Byte 3
A A dr r L L SB B
0
Byte 4
283

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