atmega3250v-8auatmega325v-8ai ATMEL Corporation, atmega3250v-8auatmega325v-8ai Datasheet - Page 30

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atmega3250v-8auatmega325v-8ai

Manufacturer Part Number
atmega3250v-8auatmega325v-8ai
Description
Atmega3250 8-bit Microcontroller With In-system Programmable Flash
Manufacturer
ATMEL Corporation
9.7
9.8
30
Clock Output Buffer
Timer/Counter Oscillator
ATmega325/3250/645/6450
Figure 9-3.
When this clock source is selected, start-up times are determined by the SUT Fuses as shown in
Table 9-10 on page
Table 9-10.
When applying an external clock, it is required to avoid sudden changes in the applied clock fre-
quency to ensure stable operation of the MCU. A variation in frequency of more than 2% from
one clock cycle to the next can lead to unpredictable behavior. It is required to ensure that the
MCU is kept in Reset during such changes in the clock frequency.
Note that the System Clock Prescaler can be used to implement run-time changes of the internal
clock frequency while still ensuring stable operation. Refer to
31
When the CKOUT Fuse is programmed, the system Clock will be output on CLKO. This mode is
suitable when the chip clock is used to drive other circuits on the system. The clock will be out-
put also during reset and the normal operation of I/O pin will be overridden when the fuse is
programmed. Any clock source, including internal RC Oscillator, can be selected when CLKO
serves as clock output. If the System Clock Prescaler is used, it is the divided system clock that
is output when the CKOUT Fuse is programmed.
ATmega325/3250/645/6450 share the Timer/Counter Oscillator Pins (TOSC1 and TOSC2) with
XTAL1 and XTAL2. This means that the Timer/Counter Oscillator can only be used when the
calibrated internal RC Oscillator is selected as system clock source. The Oscillator is optimized
for use with a 32.768 kHz watch crystal. See
SUT1..0
for details.
00
01
10
11
Start-up Time from Power-
down and Power-save
External Clock Drive Configuration
Start-up Times for the External Clock Selection
30.
6 CK
6 CK
6 CK
EXTERNAL
SIGNAL
CLOCK
NC
Additional Delay from
Reset (V
Reserved
14CK + 4.1 ms
14CK + 65 ms
Figure 9-2 on page 27
14CK
CC
= 5.0V)
XTAL2
XTAL1
GND
“System Clock Prescaler” on page
Recommended Usage
BOD enabled
Fast rising power
Slowly rising power
for crystal connection.
2570L–AVR–08/07

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