pic24hj12gp202 Microchip Technology Inc., pic24hj12gp202 Datasheet - Page 145
pic24hj12gp202
Manufacturer Part Number
pic24hj12gp202
Description
High-performance, 16-bit Digital Signal Controllers
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC24HJ12GP202.pdf
(234 pages)
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16.0
The Universal Asynchronous Receiver Transmitter
(UART) module is one of the serial I/O modules
available in the PIC24HJ12GP201/202 device family.
The UART is a full-duplex asynchronous system that
can communicate with peripheral devices, such as
personal computers, LIN, RS-232 and RS-485
interfaces. The module also supports a hardware flow
control option with the UxCTS and UxRTS pins and
also includes an IrDA
The primary features of the UART module are:
• Full-Duplex, 8- or 9-bit Data Transmission through
• Even, odd or no parity options (for 8-bit data)
• One or two stop bits
FIGURE 16-1:
© 2007 Microchip Technology Inc.
Note:
the UxTX and UxRX pins
UNIVERSAL ASYNCHRONOUS
RECEIVER TRANSMITTER
(UART)
This data sheet summarizes the features
of the PIC24HJ12GP201/202 devices. It is
not intended to be a comprehensive
reference source. To complement the
information in this data sheet, refer to the
“PIC24H
Please see the Microchip web site
(www.microchip.com)
PIC24H
chapters.
®
UART SIMPLIFIED BLOCK DIAGRAM
Family
Family
encoder and decoder.
Hardware Flow Control
Baud Rate Generator
Reference
Reference
UART Transmitter
UART Receiver
for
IrDA
the
®
Manual”.
Manual
latest
Preliminary
PIC24HJ12GP201/202
• Hardware Flow Control Option with UxCTS and
• Fully Integrated Baud Rate Generator with 16-bit
• Baud rates ranging from 1 Mbps to 15 Mbps at
• 4-deep First-In First-Out (FIFO) Transmit Data
• 4-Deep FIFO Receive Data Buffer
• Parity, framing and buffer overrun error detection
• Support for 9-bit mode with Address Detect
• Transmit and Receive interrupts
• A separate interrupt for all UART error conditions
• Loopback mode for diagnostic support
• Support for Sync and Break characters
• Support for automatic baud rate detection
• IrDA encoder and decoder logic
• 16x baud clock output for IrDA support
A simplified block diagram of the UART module is
shown in Figure 16-1. The UART module consists of
these key hardware elements:
• Baud Rate Generator
• Asynchronous Transmitter
• Asynchronous Receiver
UxRTS pins
prescaler
16 MIPS
Buffer
(9th bit = 1)
BCLK
UxRTS
UxCTS
UxRX
UxTX
DS70282B-page 143
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