attiny25v ATMEL Corporation, attiny25v Datasheet - Page 93
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attiny25v
Manufacturer Part Number
attiny25v
Description
Microcontroller With 2/4/8k Bytes In-system Programmable Flash
Manufacturer
ATMEL Corporation
Datasheet
1.ATTINY25V.pdf
(231 pages)
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12.3.2
2586K–AVR–01/08
GTCCR – General Timer/Counter1 Control Register
Table 12-5.
The Stop condition provides a Timer Enable/Disable function.
• Bit 6 - PWM1B: Pulse Width Modulator B Enable
When set (one) this bit enables PWM mode based on comparator OCR1B in Timer/Counter1
and the counter value is reset to $00 in the CPU clock cycle after a compare match with OCR1C
register value.
• Bits 5,4 - COM1B1, COM1B0: Comparator B Output Mode, Bits 1 and 0
The COM1B1 and COM1B0 control bits determine any output pin action following a compare
match with compare register B in Timer/Counter1. Output pin actions affect pin PB4 (OC1B).
Since this is an alternative function to an I/O port, the corresponding direction control bit must be
set (one) in order to control an output pin. Note that OC1B is not connected in normal mode.
Table 12-6.
In PWM mode, these bits have different functions. Refer to
description.
Bit
0x2C
Read/Write
Initial value
COM1B1
CS13
0
0
1
1
0
0
1
1
1
1
1
1
1
1
Timer/Counter1 Prescale Select (Continued)
TSM
Comparator B Mode Select
R/W
COM1B0
7
0
0
1
0
1
CS12
1
1
0
0
0
0
1
1
1
1
PWM1B
R/W
6
0
Description
Timer/Counter Comparator B disconnected from output pin OC1B.
Toggle the OC1B output line.
Clear the OC1B output line.
Set the OC1B output line
COM1B1
CS11
R/W
1
1
0
0
1
1
0
0
1
1
5
0
COM1B0
R/W
4
0
CS10
0
1
0
1
0
1
0
1
0
1
FOC1B
W
3
0
Asynchronous
Clocking Mode
PCK/32
PCK/64
PCK/128
PCK/256
PCK/512
PCK/1024
PCK/2048
PCK/4096
PCK/8192
PCK/16384
Table 12-1 on page 89
FOC1A
W
2
0
ATtiny25/45/85
PSR1
R/W
1
0
Synchronous
Clocking Mode
CK/32
CK/64
CK/128
CK/256
CK/512
CK/1024
CK/2048
CK/4096
CK/8192
CK/16384
PSR0
R/W
0
0
for a detailed
GTCCR
93
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