attiny25v ATMEL Corporation, attiny25v Datasheet - Page 51

• Manufacturer Part Number: attiny25v
• Description: Microcontroller With 2/4/8k Bytes In-system Programmable Flash
• Manufacturer: ATMEL Corporation

9.2
9.2.1
2586K–AVR–01/08
External Interrupts
Low Level Interrupt
The External Interrupts are triggered by the INT0 pin or any of the PCINT5..0 pins. Observe that,
if enabled, the interrupts will trigger even if the INT0 or PCINT5..0 pins are configured as out-
puts. This feature provides a way of generating a software interrupt. Pin change interrupts PCI
will trigger if any enabled PCINT5..0 pin toggles. The PCMSK Register control which pins con-
tribute to the pin change interrupts. Pin change interrupts on PCINT5..0 are detected
asynchronously. This implies that these interrupts can be used for waking the part also from
sleep modes other than Idle mode.
The INT0 interrupts can be triggered by a falling or rising edge or a low level. This is set up as
indicated in the specification for the MCU Control Register – MCUCR. When the INT0 interrupt is
enabled and is configured as level triggered, the interrupt will trigger as long as the pin is held
low. Note that recognition of falling or rising edge interrupts on INT0 requires the presence of an
I/O clock, described in
A low level interrupt on INT0 is detected asynchronously. This implies that this interrupt can be
used for waking the part also from sleep modes other than Idle mode. The I/O clock is halted in
all sleep modes except Idle mode.
Note that if a level triggered interrupt is used for wake-up from Power-down, the required level
must be held long enough for the MCU to complete the wake-up to trigger the level interrupt. If
the level disappears before the end of the Start-up Time, the MCU will still wake up, but no inter-
rupt will be generated. The start-up time is defined by the SUT and CKSEL Fuses as described
in
If the low level on the interrupt pin is removed before the device has woken up then program
execution will not be diverted to the interrupt service routine but continue from the instruction fol-
lowing the SLEEP command.
“System Clock and Clock Options” on page
0x000A
0x000B
0x000C
0x000D
0x000E
0x000F
0x0010
0x0011
0x0012
0x0013
0x0014
...
RESET: ldi
...
<instr>
rjmp
rjmp
rjmp
rjmp
rjmp
ldi
out
out
sei
“Clock Systems and their Distribution” on page
...
xxx
...
TIM0_COMPA
TIM0_COMPB
WDT
USI_START
USI_OVF
r16, low(RAMEND); Main program start
r17, high(RAMEND); Tiny45/85 also has SPH
SPL, r16
SPH, r17
23.
;
;
;
;
;
; Set Stack Pointer to top of RAM
; Tiny45/85 als has SPH
; Enable interrupts
ATtiny25/45/85
23.
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