attiny25v ATMEL Corporation, attiny25v Datasheet - Page 109
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attiny25v
Manufacturer Part Number
attiny25v
Description
Microcontroller With 2/4/8k Bytes In-system Programmable Flash
Manufacturer
ATMEL Corporation
Datasheet
1.ATTINY25V.pdf
(231 pages)
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14.1
14.1.1
2586K–AVR–01/08
Register Description
DTPS1 – Timer/Counter1 Dead Time Prescaler Register 1
The length of the counting period is user adjustable by selecting the dead time prescaler setting
in 0x23 register, and selecting then the dead time value in I/O register DT1x. The DT1x register
consists of two 4-bit fields, DT1xH and DT1xL that control the dead time periods of the PWM
output and its’ complementary output separately. Thus the rising edge of OC1x and OC1x can
have different dead time periods. The dead time is adjusted as the number of prescaled dead
time generator clock cycles.
Figure 14-3. The Complementary Output Pair
The dead time prescaler register, DTPS1 is a 2-bit read/write register.
• Bits 1:0- DTPS11:DTPS10: Dead Time Prescaler
The dedicated Dead Time prescaler in front of the Dead Time Generator can divide the
Timer/Counter1 clock (PCK or CK) by 1, 2, 4 or 8 providing a large range of dead times that can
be generated. The Dead Time prescaler is controlled by two bits DTPS11..10 from the Dead
Time Prescaler register. These bits define the division factor of the Dead Time prescaler. The
division factors are given in table 46..
Table 14-1.
Bit
0x23
Read/Write
Initial value
DTPS11
PWM1x
OC1x
OC1x
x = A or B
0
0
1
1
t
non-overlap / rising edge
Division factors of the Dead Time prescaler
R
7
0
DTPS10
0
1
0
1
R
6
0
Prescaler divides the T/C1 clock by
1x (no division)
2x
4x
8x
t
non-overlap / falling edge
R
5
0
R
4
0
R
3
0
R
2
0
ATtiny25/45/85
DTPS11
R/W
1
0
DTPS10
R/W
0
0
DTPS1
109
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