attiny25v ATMEL Corporation, attiny25v Datasheet - Page 27

• Manufacturer Part Number: attiny25v
• Description: Microcontroller With 2/4/8k Bytes In-system Programmable Flash
• Manufacturer: ATMEL Corporation

6.2.3
2586K–AVR–01/08
Calibrated Internal Oscillator
a system clock source, by programming the CKSEL fuses to ‘0001’, it is divided by four like
shown in
Table 6-4.
When this clock source is selected, start-up times are determined by the SUT fuses as shown in
Table
Table 6-5.
By default, the Internal RC Oscillator provides an approximate 8.0 MHz clock. Though voltage
and temperature dependent, this clock can be very accurately calibrated by the user. See
brated Internal RC Oscillator Accuracy” on page 169
195
Clock Prescaler” on page 31
This clock may be selected as the system clock by programming the CKSEL Fuses as shown in
Table 6-6 on page
hardware loads the pre-programmed calibration value into the OSCCAL Register and thereby
automatically calibrates the RC Oscillator. The accuracy of this calibration is shown as Factory
calibration in
By changing the OSCCAL register from SW, see
page
The accuracy of this calibration is shown as User calibration in
When this Oscillator is used as the chip clock, the Watchdog Oscillator will still be used for the
Watchdog Timer and for the Reset Time-out. For more information on the pre-programmed cali-
bration value, see the section
The internal oscillator can also be set to provide a 6.4 MHz clock by writing CKSEL fuses to
“0011”, as shown in
and is intended to provide a calibrated clock source at 6.4 MHz, as in ATtiny15. In ATtiny15
Compatibility Mode the PLL uses the internal oscillator running at 6.4 MHz to generate a 25.6
MHz peripheral clock signal for Timer/Counter1 (see
SUT1:0
00
01
10
11
for more details. The device is shipped with the CKDIV8 Fuse programmed. See
32, it is possible to get a higher calibration accuracy than by using the factory calibration.
6-5.
Table
14CK + 16K (16384) CK + 64 ms
14CK + 16K (16384) CK + 4 ms
14CK + 1K (1024) CK + 64 ms
14CK + 1K (1024) CK + 4 ms
Table 21-2 on page
CKSEL3:0
High Frequency PLL Clock Operating Modes
Start-up Times for the High Frequency PLL Clock
6-4.
0001
Start-up Time from
28. If selected, it will operate with no external components. During reset,
Power Down
Table 6-6
for more details.
“Calibration Bytes” on page
below. This setting is reffered to as ATtiny15 Compatibility Mode
169.
Power-On Reset (V
Additional Delay from
“OSCCAL – Oscillator Calibration Register” on
“8-bit Timer/Counter1 in ATtiny15 Mode”
and
4 ms
4 ms
4 ms
4 ms
Nominal Frequency
154.
“Internal Oscillator Speed” on page
CC
Table 21-2 on page
16 MHz
= 5.0V)
ATtiny25/45/85
Recommended
usage
BOD enabled
Fast rising power
Slowly rising power
Slowly rising power
169.
“System
“Cali-
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