attiny25v ATMEL Corporation, attiny25v Datasheet - Page 82

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attiny25v

Manufacturer Part Number
attiny25v
Description
Microcontroller With 2/4/8k Bytes In-system Programmable Flash
Manufacturer
ATMEL Corporation
Datasheet

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11.9.3
82
ATtiny25/45/85
TCCR0B – Timer/Counter Control Register B
Table 11-5.
Notes:
• Bit 7 – FOC0A: Force Output Compare A
The FOC0A bit is only active when the WGM bits specify a non-PWM mode.
However, for ensuring compatibility with future devices, this bit must be set to zero when
TCCR0B is written when operating in PWM mode. When writing a logical one to the FOC0A bit,
an immediate Compare Match is forced on the Waveform Generation unit. The OC0A output is
changed according to its COM0A1:0 bits setting. Note that the FOC0A bit is implemented as a
strobe. Therefore it is the value present in the COM0A1:0 bits that determines the effect of the
forced compare.
A FOC0A strobe will not generate any interrupt, nor will it clear the timer in CTC mode using
OCR0A as TOP.
The FOC0A bit is always read as zero.
• Bit 6 – FOC0B: Force Output Compare B
The FOC0B bit is only active when the WGM bits specify a non-PWM mode.
However, for ensuring compatibility with future devices, this bit must be set to zero when
TCCR0B is written when operating in PWM mode. When writing a logical one to the FOC0B bit,
an immediate Compare Match is forced on the Waveform Generation unit. The OC0B output is
changed according to its COM0B1:0 bits setting. Note that the FOC0B bit is implemented as a
strobe. Therefore it is the value present in the COM0B1:0 bits that determines the effect of the
forced compare.
A FOC0B strobe will not generate any interrupt, nor will it clear the timer in CTC mode using
OCR0B as TOP.
Bit
0x33
Read/Write
Initial Value
Mode
0
1
2
3
4
5
6
7
1. MAX
2. BOTTOM = 0x00
WGM
02
0
0
0
0
1
1
1
1
7
FOC0A
W
0
Waveform Generation Mode Bit Description
WGM
01
= 0xFF
0
0
1
1
0
0
1
1
6
FOC0B
W
0
WGM
00
0
1
0
1
0
1
0
1
5
R
0
Timer/Counter Mode
of Operation
Normal
PWM, Phase Correct
CTC
Fast PWM
Reserved
PWM, Phase Correct
Reserved
Fast PWM
4
R
0
3
WGM02
R/W
0
OCRA
OCRA
OCRA
0xFF
0xFF
0xFF
2
CS02
R/W
0
TOP
BOTTOM
BOTTOM
1
CS01
R/W
0
Update of
Immediate
Immediate
OCRx at
TOP
TOP
(2)
(2)
0
CS00
R/W
0
2586K–AVR–01/08
BOTTOM
BOTTOM
TOV Flag
Set on
MAX
MAX
MAX
TOP
TCCR0B
(1)
(1)
(1)
(2)
(2)

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