tmp88fw45afg TOSHIBA Semiconductor CORPORATION, tmp88fw45afg Datasheet - Page 29

• Manufacturer Part Number: tmp88fw45afg
• Description: 8 Bit Microcontroller Tlcs-870/x Series
• Manufacturer: TOSHIBA Semiconductor CORPORATION

System Control Register 1
System Control Register 2
SYSCR1
SYSCR2
(0038H)
(0039H)
Note 1: When entering from NORMAL mode into STOP mode, always be sure to set SYSCR1<RETM> to 0.
Note 2: When the device is released from STOP mode by RESET pin input, it always returns to NORMAL mode regardless of
Note 3: fc: High-frequency clock [Hz], *: Don’t care
Note 4: The values of the SYSCR1 Register bits 1 and 0 are indeterminate when read.
Note 5: When placed the device in STOP mode, make sure to set "1" to SYSCR1<OUTEN>.
Note 6: Releasing the device from the STOP mode causes the STOP bit to be automatically cleared to “0”.
Note 7: Select an appropriate value for the warm-up time according to the characteristic of the resonator used.
Note 1: When exiting STOP mode, SYSCR2<XEN and SYSCK> are automatically rewritten according to SYSCR1<RETM>.
Note 2: When SYSCR2<XEN>is cleared to 0, the device is reset.
Note 3: WDT: Watchdog Timer, *: Don’t care
Note 4: Be sure to write "0" to SYSCR2 Register bit6.
Note 5: The values of the SYSCR2 Register bits 3 to 0 are indeterminate when read.
Note 6: Change the operation mode after disabling external interrupts. If interrupts are enabled after changing operation mode,
STOP
XEN
OUTEN
SYSCK
how SYSCR1<RETM> is set.
clear interrupt latches as appropriate in advance.
RETM
STOP
RELM
WUT
7
7
IDLE
XEN
RELM
6
6
0
Place the device in STOP mode
Select method by which the de-
vice is released from STOP
mode
Select operation mode after ex-
iting STOP mode
Select port output state during
STOP mode
Unit of warm-up time when ex-
iting STOP mode
Control high-frequency oscilla-
tor
Select (write)/monitor (read)
system clock
Place the device in IDLE mode
RETM
0
1
SYSCK
RETM
5
5
NORMAL mode
No operation
Operation Mode after Releasing STOP Mode
OUTEN
IDLE
4
4
0: Keep the CPU core and peripheral hardware operating
1: Stop the CPU core and peripheral hardware (placed in STOP mode)
0: Released by a rising edge on STOP pin input
1: Released by a high level on STOP pin input
0: Returns to NORMAL mode
1: Reserved
0: High-impedance state
1: Hold output
0: Stop oscillation
1: Continue or start oscillating
0: High-frequency clock (NORMAL/IDLE)
1: Reserved
0: Keep the CPU and WDT operating
1: Stop the CPU and WDT (IDLE mode entered)
3
3
00
01
10
11
WUT
Page 15
2
2
DV1CK = 0
Reserved
3 × 2
1
1
2
2
16
14
When Returning to NORMAL Mode
/fc
/fc
16
/fc
XEN
0
0
1
0
(Initial value: 0000 00**)
(Initial value: 1000 ****)
SYSCK
0
1
DV1CK = 1
Reserved
3 × 2
2
2
17
15
TMP88FW45AFG
/fc
/fc
17
/fc
R/W
R/W
R/W
R/W