tmp88fw45afg TOSHIBA Semiconductor CORPORATION, tmp88fw45afg Datasheet - Page 207

• Manufacturer Part Number: tmp88fw45afg
• Description: 8 Bit Microcontroller Tlcs-870/x Series
• Manufacturer: TOSHIBA Semiconductor CORPORATION

16.4
16.5
transfer rate are determined as follows:
detected in RXD pin input. RT clock starts detecting “L” level of the RXD pin. Once a start bit is detected, the start
bit, data bits, stop bit(s), and parity bit are sampled at three times of RT7, RT8, and RT9 during one receiver clock
interval (RT clock). (RT0 is the position where the bit supposedly starts.) Bit is determined according to majority rule
(The data are the same twice or more out of three samplings).
RXD pin
RXD pin
RT clock
Internal receive data
RT clock
Internal receive data
The baud rate of UART2 is set of UARTCR21<BRG>. The example of the baud rate are shown as follows.
When INTTC4 is used as the UART2 transfer rate (when UARTCR21<BRG> = “110”), the transfer clock and
Transfer clock [Hz] = TC4 source clock [Hz] / TC4DR setting value
Transfer Rate [baud] = Transfer clock [Hz] / 16
The UART2 receiver keeps sampling input using the clock selected by UARTCR21<BRG> until a start bit is
Transfer Rate
Data Sampling Method
Table 16-1 Transfer Rate (Example)
BRG
000
001
010
011
100
101
RT0 1
RT0 1
Figure 16-4 Data Sampling Method
Start bit
Start bit
Start bit
Start bit
2
2
3 4
3 4
76800 [baud]
5 6
5 6
(a) Without noise rejection circuit
(b) With noise rejection circuit
16 MHz
38400
19200
9600
4800
2400
Page 193
7
7
8 9 10 11 12 13 14 15 0
8 9 10 11 12 13 14 15 0
Source Clock
Bit 0
38400 [baud]
8 MHz
19200
9600
4800
2400
1200
Bit 0
Bit 0
Bit 0
1
1
2 3
2 3
4 5
4 5
6
6
TMP88FW45AFG
7 8
7 8
9 10 11
9 10 11