tmp88fw45afg TOSHIBA Semiconductor CORPORATION, tmp88fw45afg Datasheet - Page 222

• Manufacturer Part Number: tmp88fw45afg
• Description: 8 Bit Microcontroller Tlcs-870/x Series
• Manufacturer: TOSHIBA Semiconductor CORPORATION

17.6
Transfer Mode
SIOCR1<SIOS>
SIOSR<SIOF>
SIOSR<SEF>
INTSIO interrupt
SCK pin
(output)
SO pin
SI pin
DBR
Figure 17-11 Transfer / Receive Mode (Example: 8bit, 1word transfer, Internal clock)
“1” in INTSIO interrupt service program.
the transmitting/receiving is ended at the time that the final bit of the data has been transmitted.
is cleared to “0” when the transmitting/receiving is ended.
cleared to “0”.
to “0”, then SIOCR2<BUF> must be rewritten after confirming that SIOSR<SIOF> has been cleared to “0”.
after completion of transmit/receive operation, SIOCR2<BUF> must be rewritten before reading and writing of
the receive/transmit data.
The transmit/receive operation is ended by clearing SIOCR1<SIOS> to “0” or setting SIOCR1<SIOINH> to
When SIOCR1<SIOS> is cleared, the current data are transferred to the buffer. After SIOCR1<SIOS> cleared,
That the transmitting/receiving has ended can be determined from the status of SIOSR<SIOF>. SIOSR<SIOF>
When SIOCR1<SIOINH> is set, the transmit/receive operation is immediately ended and SIOSR<SIOF> is
If it is necessary to change the number of words in external clock operation, SIOCR1<SIOS> should be cleared
If it is necessary to change the number of words in internal clock, during automatic-wait operation which occurs
Note:The buffer contents are lost when the transfer mode is switched. If it should become necessary to switch
Write (a)
the transfer mode, end receiving by clearing SIOCR1<SIOS> to “0”, read the last data and then switch
the transfer mode.
a
a
c
0
0
a
c
1
1
a
c
2
2
a
c
3
3
a
c
4
4
a
c
5
5
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Read out (c)
a
c
6
6
a
c
7
7
c
Write (b)
b
b
d
0
0
b
d
1
1
b
d
2
2
Clear SIOS
b
d
3
3
b
d
4
4
TMP88FW45AFG
b
d
5
5
b
d
6
6
Read out (d)
b
d
7
7
d