psd813f1a-90ut STMicroelectronics, psd813f1a-90ut Datasheet - Page 72

• Manufacturer Part Number: psd813f1a-90ut
• Description: Flash In-system Programmable Isp Peripherals For 8-bit Mcus
• Manufacturer: STMicroelectronics

Preliminary
PLD Combinatorial Timing
Write Timing
NOTE: 1. Fast Slew Rate output available on PA[3:0], PB[3:0], and PD[2:0].
Microcontroller Interface – PSD913F1 AC/DC Parameters
(5V ± 10% Versions)
NOTES: 1.
Symbol
t
t
Symbol
PD
ARD
t
t
t
t
t
t
t
t
t
t
t
t
LVLX
AVLX
LXAX
AVWL
WHAX 1
WHAX 2
WHPV
AVPV
SLWL
DVWH
WHDX
WLWH
2.
3.
4.
PLD Input Pin/Feedback
to PLD Combinatorial
Output
PLD Array Delay
ALE or AS Pulse Width
Address Setup Time
Address Hold Time
Address Valid to Leading
Edge of WR
CS Valid to Leading Edge of WR
WR Data Setup Time
WR Data Hold Time
WR Pulse Width
Trailing Edge of WR to Address
Invalid
Trailing Edge of WR to DPLD
Address Input Invalid
Trailing Edge of WR to Port Output
Valid Using I/O Port Data Register
Address Input Valid to Address
Output Delay
Any input used to select an internal PSD913F1 function.
In multiplexed mode, latched addresses generated from ADIO delay to address output on any Port.
WR timing has the same timing as E, LDS, UDS, WRL, and WRH signals.
Address Hold Time for DPLD inputs that are used to generate chip selects for internal PSD memory.
(5 V ± 10% Versions)
Parameter
Parameter
(5 V ± 10%)
Conditions
(Note 1)
(Note 1)
(Notes 1 and 3)
(Note 3)
(Note 3)
(Note 3)
(Note 3)
(Note 3)
(Notes 3 and 4)
(Note 3)
(Note 2)
Conditions
Min
-90
Max
25
16
Min
Min
-12
20
20
35
25
35
6
8
5
8
0
Max
-90
30
18
Max
30
25
Min
Min
22
25
30
40
40
-15
8
9
5
9
0
-12
Max
32
22
Max
35
28
Add 10 Sub 2
TURBO Slew
OFF
Min
28
10
30
35
45
45
10
11
5
0
-15
(Note 1)
Max
38
30
PSD913F1
Unit
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
71