lan83c175 Standard Microsystems Corp., lan83c175 Datasheet - Page 9

• Manufacturer Part Number: lan83c175
• Description: Ethernet Cardbus Integrated Controller With Modem Support Corporation
• Manufacturer: Standard Microsystems Corp.

The LAN83C175 EPIC/C is a high-performance
Ethernet network controller designed to interface
directly to the CardBus Local Bus on one side
and to the 802.3 standard Media Independent
Interface (MII) on the other side. The network
interface
communicate directly with the LAN83C694
10BASE-T transceiver.
The LAN83C175
Access Control functions.
running at Ethernet rates of both 100 Mbps and
10
management interface is provided to control
external
LAN83C175 is a two channel bus master (one
for transmit, one for receive) capable of
transferring data at the maximum CardBus
transfer rate of 132 Mbps. Buffer format in host
memory is controlled by an independent linked
list structure for each channel.
The LAN83C175's architecture is essentially
broken
receive processes which share CardBus bus
and network bandwidth.
ideal
transmission and reception of frames may occur
simultaneously. An internal arbiter controls
which process has access to the CardBus bus
at a given time (see section on "transmit/receive
arbitration for CardBus bus").
for
Mbps.
media
into two independent transmit and
can
full-duplex
An
dependent transceivers. The
also
implements
MII
be
This architecture is
compliant
networks
It is capable of
configured
FUNCTIONAL DESCRIPTION
802.3
serial
Media
where
to
9
The transmit process consists of a DMA
controller, local transmit RAM, memory transfer
unit ("MTU") and CSMA/CD transmit state
machine. The transmit DMA copies packet data
from host memory into the local buffer. When
ready, the memory transfer unit feeds data from
the
machine, which is responsible for sending data
out on the network under the Ethernet protocol.
When transmission is complete, the transmit
DMA posts the transmit status into host
memory, interrupts the host (optionally) and
looks for the next transmit packet to be queued.
Like the transmit process, the receive process
consists of a DMA controller, local receive RAM,
memory transfer unit and CSMA/CD state
machine.
CSMA/CD state machine and stored into local
memory by the receive MTU. The receive DMA
then copies the data from the local buffer into
host memory, posts the receive status and
interrupts the host. The LAN83C175 has several
features designed to minimize CPU utilization,
including the optional Receive Look-ahead
Buffering Mode, which eliminates the need to re-
copy the data from one host memory location to
another. Figure 2 on the following page shows
a block diagram of the LAN83C175.
transmit buffer
Packets
to
are
the CSMA/CD state
received
by
the