lan83c175 Standard Microsystems Corp., lan83c175 Datasheet - Page 54
![no-image](/images/no-image-200.jpg)
lan83c175
Manufacturer Part Number
lan83c175
Description
Ethernet Cardbus Integrated Controller With Modem Support Corporation
Manufacturer
Standard Microsystems Corp.
Datasheet
1.LAN83C175.pdf
(92 pages)
- Current page: 54 of 92
- Download datasheet (291Kb)
BC - PREEMPTIVE INTERRUPT
Reset Value: 00000000000
This register is used to set the preemptive
interrupt value, the number of bytes before the
end of a packet that a packet received
interrupt will be issued.
writable but is not readable.
10 through 0 - PREEMPTIVE INTERRUPT
VALUE:
before the end of the packet that the interrupt
will be issued.
C0
DESCRIPTOR ADDRESS
Reset Value:
xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx00
This register contains the byte address of the
first descriptor for the current transmit packet.
It is the location in host memory where the
transmit
transmission is complete. The two lsb’s are
fixed at zero so the address will always be
dword aligned. This register is automatically
written with the same data as the PTCDAR
register whenever a write to that register
occurs.
31 through 2 - CardBus Address.
1 and 0 - Not writable - always return zeroes.
C4
DESCRIPTOR ADDRESS
Reset Value:
XXXXXXXXXXXXXXXXXXXXXXXXXXXXXX0
0
-
-
CardBus
This value is the number of bytes
status
CardBus
will
TRANSMIT
TRANSMIT
be
The register is
posted
CURRENT
FIRST
when
54
This register contains the byte address (in host
memory) of the next descriptor that the transmit
DMA will read. The two low significant bits are
fixed at zero so the address will always be dword
aligned. This register must be initialized once after
reset.
31 through 2: CardBus Address.
1 and 0: Not writable - always return zeroes.
C8
ADDRESS
Reset Value: xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
This register contains the address where transmit
packet data is to be read from host memory. The
upper 30 bits are driven onto the CardBus bus as
the dword address, and are incremented each
time a dword is read from host memory. The two
lsb’s always contain the starting byte address of
the data buffer, and are used by the transmit DMA
to control byte alignment.
31 through 2 - CardBus Address.
1 and 0 - Starting Byte Address.
CC - CardBus TRANSMIT FRAGMENT LIST
ADDRESS
Reset Value: xxxxxxxxxxxxxxxxxxxxxxxxxxxxx00
This register contains the current fragment list
address. It is the location in host memory of the
next fragment list entry that the transmit DMA will
read.
address will always be dword aligned.
31 through 2 - Address.
1 and 0 - Not writable - always return zeroes.
-
The two lsb’s are fixed at zero so the
CardBus
TRANSMIT
HOST
DATA
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