adsp-bf527c Analog Devices, Inc., adsp-bf527c Datasheet - Page 28

no-image

adsp-bf527c

Manufacturer Part Number
adsp-bf527c
Description
Blackfin Embedded Processor
Manufacturer
Analog Devices, Inc.
Datasheet
ADSP-BF523C/ADSP-BF525C/ADSP-BF527C
Table 29. Register Descriptions (Continued)
Register Address
Register 3
000 0011
Right Headphone Out
Register 4
000 0100
Analog Audio
Path Control
Register 5
000 0101
Digital Audio
Path Control
Bit Label
6:0 RHPVOL
7 RZCEN
8 RLHPBOTH
0 MICBOOST
1 MUTEMIC
2 INSEL
3 BYPASS
4 DACSEL
5 SIDETONE
7:6 SIDEATT[1:0] 00
0 ADCHPD
2:1 DEEMP[1:0] 00
3 DACMU
4 HPOR
[6:0]
Default Description
1111001
( 0 dB )
0
0
0
1
0
1
0
0
0
1
0
Right Channel Headphone Output Volume Control
1111111 = +6 dB in 1 dB Steps Down to 0110000 = –73 dB
0000000 to 0101111 = MUTE
Right Channel Zero Cross Detect Enable
1 = Enable
0 = Disable
Right to Left Channel Headphone Volume, Mute and Zero Cross Data Load Control
1 = Enable Simultaneous Load of RHPVOL[6:0] and RZCEN to LHPVOL[6:0] and LZCEN
0 = Disable Simultaneous Load
Microphone Input Level Boost
1 = Enable Boost
0 = Disable Boost
Mic Input Mute to ADC
1 = Enable Mute
0 = Disable Mute
Microphone/Line Input Select to ADC
1 = Microphone Input Select to ADC
0 = Line Input Select to ADC
Bypass Switch
1 = Enable Bypass
0 = Disable Bypass
DAC Select
1 = Select DAC
0 = Do Not Select DAC
Side Tone Switch
1 = Enable Side Tone
0 = Disable Side Tone
Side Tone Attenuation
11 = –15 dB
10 = –12 dB
01 = –9 dB
00 = –6 dB
ADC High Pass Filter Enable
1 = Disable High Pass Filter
0 = Enable High Pass Filter
De-emphasis Control
11 = 48 kHz
10 = 44.1 kHz
01 = 32 kHz
00 = Disable
DAC Soft Mute Control
1 = Enable Soft Mute
0 = Disable Soft Mute
Store DC Offset When High Pass Filter Disabled
1 = Store Offset
0 = Clear Offset
Rev. PrC | Page 28 of 44 | June 2008
Preliminary Technical Data

Related parts for adsp-bf527c