tda933xh NXP Semiconductors, tda933xh Datasheet - Page 19
![no-image](/images/manufacturer_photos/0/4/487/nxp_semiconductors_sml.jpg)
tda933xh
Manufacturer Part Number
tda933xh
Description
Tda933xh Series I2c-bus Controlled Tv Display Processors
Manufacturer
NXP Semiconductors
Datasheet
1.TDA933XH.pdf
(56 pages)
- Current page: 19 of 56
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Philips Semiconductors
2002 Jun 04
General
I
SS
SS
C
PAL/SECAM mode; the matrix results in the following signal
G Y
ATSC mode; the matrix results in the following signal; note 4
G Y
NTSC mode; the matrix results in the following modified colour difference signals
MUS bit = 0 (Japan)
R
G
B
MUS bit = 1 (USA)
R
G
B
C
Saturation control; note 9
CR
CR
CR
Contrast control; note 9
CR
Brightness control; note 9
CR
i(BL2)
t
OLOUR DIFFERENCE MATRICES
ONTROLS
I
d
SYMBOL
2
int
ext
sat
sat(nom)
sat(min)
contr
bri
C-bus controlled TV display processors
Y
Y
Y
Y
Y
Y
delay difference between insertion
to RGB out and RGB in to RGB out
input current
suppression of internal RGB
signals
suppression of external RGB
signals
G
G
(R
(G
(B
(R
(G
(B
saturation control range
I
saturation
minimum saturation
contrast control range
tracking between the three
channels over a control range of
10 dB
brightness control range
2
C-bus setting for nominal
Y
Y
Y)*
Y)*
Y)*
Y)*
Y)*
Y)*
PARAMETER
; note 3
data insertion; note 5
source current; note 6
insertion; f
notes 5 and 7
no insertion;
f
notes 5 and 7
small signal gain; 63 steps;
see Fig.5
YUV input signal
I
63 steps; see Fig.6
63 steps; see Fig.7
i
2
= 0 to 10 MHz;
C-bus setting 0
19
CONDITIONS
i
= 0 to 10 MHz;
50
50
1.39 (R
B
1.32 (R
0
MIN.
0.51 (R
0.30 (R
0.46 (R
0.42 (R
0.03 (R
Y
TDA933xH series
20
55
55
18 DEC
18
Y)
Y)
1
50
1.1
TYP.
Y)
Y)
Y)
Y)
Y) +1.08 (B
Preliminary specification
0.07 (B
0.12 (B
0.19 (B
0.10 (B
0.15 (B
0.25 (B
26
300
0.5
5
MAX.
Y)
Y)
Y)
Y)
Y)
Y)
Y)
ns
dB
dB
%
dB
dB
dB
V
UNIT
A
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