adc12eu050eb National Semiconductor Corporation, adc12eu050eb Datasheet - Page 4

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adc12eu050eb

Manufacturer Part Number
adc12eu050eb
Description
Adc12eu050 Ultra-low Power, Octal, 12-bit, 40-50 Msps Sigma-delta Analog-to-digital Converter
Manufacturer
National Semiconductor Corporation
Datasheet
www.national.com
ANALOG I/O
DIGITAL I/O
Pin Descriptions
Pin No.
67
68
64
65
61
62
58
59
55
56
52
53
49
50
10
2
3
4
5
6
7
9
SLEEP
Name
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
D
R
RST
REFB
IN
IN
IN
IN
IN
IN
IN
IN
REFT
IN
IN
IN
IN
IN
IN
IN
IN
CAP
REF
0+
1+
2+
3+
4+
5+
6+
7+
0-
1-
2-
3-
4-
5-
6-
7-
Input/Output
Type
Input
Input
Input
Input
4
Differential analog inputs to the ADC, for channels 0 to 7. The
negative input pin may be connected via a capacitor to AGND or
the inputs may be transformer coupled for single ended operation.
Differential inputs are recommended for best performance.
Optional negative reference voltage to improve multi-channel ADC
matching. This pin must be connected to AGND.
Optional positive reference voltage to improve multi-channel ADC
matching. If using the internal reference, this pin should be left tied
to AGND through a 100nF capacitor. If using an external reference
voltage, this pin should be connected to the positive reference
voltage, which must lie in the range specified in the Electrical
Characteristics table.
This pin provides the capacitance for the low pass filter in the
modulator’s DAC. It must be connected to AGND through a
minimum 100nF capacitor. It is possible to decrease the noise
close to the carrier by increasing this capacitor, up to a maximum
of 10μF. See Applications Information for further information on the
selection of this capacitor.
External bias reference resistor. This pin must always be
connected to AGND through a resistor, whether the internal
reference or an external reference voltage is used. The resistor
value must be 10kΩ ±1%.
This pin is an active low reset for the entire ADC, both analog and
digital components. The pin must be held low for 500ns then
returned to high in order to ensure that the chip is reset correctly.
Sleep mode. Toggling this pin to high will cause the ADC to enter
the low power sleep mode. When the pin is returned to low, the
chip will, after the specified time to exit sleep mode, return to normal
operation.
Function and Connection

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