adc12eu050eb National Semiconductor Corporation, adc12eu050eb Datasheet - Page 22

• Manufacturer Part Number: adc12eu050eb
• Description: Adc12eu050 Ultra-low Power, Octal, 12-bit, 40-50 Msps Sigma-delta Analog-to-digital Converter
• Manufacturer: National Semiconductor Corporation

overlaid. There is no ringing and recovery from overload is
instantaneous.
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FIGURE 7. Instant Overload Recovery
1.3 INTEGRATED PRECISION LC PLL
The ADC12EU050 family includes an integrated high perfor-
mance “clean up” phase locked loop (PLL), simplifying the
need for a low jitter external clock. The PLL serves three im-
portant functions; it generates a highly accurate internal sam-
pling clock source of up to 800 MHz; a clock for the LVDS
serializers at 600 MHz; and it provides a low jitter clock for
other internal components. With its jitter clean-up capability
this PLL allows lower performance system clocks to be used.
1.4 DIGITAL DECIMATION FILTER AND EQUALIZER
The digital decimation filter is an integral part of the sigma
delta architecture. It decimates the over-sampled data from
the modulator down to the sample rate, and its extremely
sharp low pass characteristic combined with the modulator’s
broad band response provides the intrinsic anti-alias filter.
The digital low pass filter exhibits 72dB of attenuation in the
stop band. The following diagram shows the digital filter trans-
fer function at 40MSPS, compared to a third order Butterworth
transfer function. Due to the digital implementation of the filter,
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the filter parameters automatically scale with the ADC sam-
FIGURE 8. Digital Filter Transfer Function
pling frequency.
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