pc8477b National Semiconductor Corporation, pc8477b Datasheet - Page 8

• Manufacturer Part Number: pc8477b
• Description: Advanced Floppy Disk Controller
• Manufacturer: National Semiconductor Corporation

PLL0
PLL1
RD
RDATA
RESET
STEP
TC
TRK0
V
WDATA
WGATE
WP
WR
XTAL1 CLK
XTAL2
CC
2 0 Pin Description
Note 1 When converting the 68 pin PLCC to a 60 pin PQFP eight pins were removed The following signals were affected in this conversion process
Symbol
1 NC (No Connect) signals on pins 42 and 43 of the 68 pin PLCC were converted to GND (Ground) signals on pins 14 and 15 of the 60 pin PQFP
respectively
2 NC (No Connect) signals on pins 44 and 47 of the 68 pin PLCC were removed for the 60 pin PQFP
3 HIFIL (pin 38) and LOFIL (pin 37) of the 68 pin PLCC were removed for the 60 pin PQFP
4 PLL0 (pin 39) and PLL1 (pin 40) of the 68 PLCC were converted to GND (ground) signals on the PQFP (pins 11 and 12 respectively)
5 The GND (ground) signals on pins 9 12 21 and 65 of the 68 pin PLCC are not available for the 60 pin PQFP These signals are tied to ground internally
PLCC
Pin
39
40
41
32
55
25
18
60
68
53
52
33
34
4
2
1
5
(Note 1)
PQFP
Pin
41
13
25
59
39
30
37
53
23
22
38
42
6
7
8
(Continued)
I O
O
O
O
I
I
I
I
I
I
I
I
I
Phase Locked Loop 0 1 No connects These pins can be tied high or low with no affect
on the data separator performance
Read Active low input to signal a read from the controller to the microprocessor
Read Data This input is the raw serial data read from the disk drive
Reset Active high input that resets the controller to the idle state and resets all disk
interface outputs to their inactive states The DOR DSR CCR Mode command
Configure command and Lock command parameters are cleared to their default values
The Specify command parameters are not affected
Step This output signal issues pulses to the disk drive at a software programmable rate
to move the head during a seek operation
Terminal Count Control signal from the DMA controller to indicate the termination of a
DMA transfer TC is accepted only when DACK is active TC is active high in PC-AT and
Model 30 modes and active low in PS 2 mode
Track 0 This input indicates to the controller that the head of the selected disk drive is at
track zero
Voltage This is the
Write Data This output is the write precompensated serial data that is written to the
selected disk drive Precompensation is software selectable
Write Gate This output signal enables the write circuitry of the selected disk drive
WGATE has been designed to prevent glitches during power up and power down This
prevents writing to the disk when power is cycled
Write Protect This input indicates that the disk in the selected drive is write protected
Write Active low input to signal a write from the microprocessor to the controller
Crystal1 Clock One side of an external 24 MHz crystal is attached here If a crystal is
not used a TTL or CMOS compatible clock is connected to this pin
Crystal2 One side of an external 24 MHz crystal is attached here This pin is left
unconnected if an external clock is used
a
5V supply voltage for the digital circuitry
8
Function