pc8477b National Semiconductor Corporation, pc8477b Datasheet - Page 43

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pc8477b

Manufacturer Part Number
pc8477b
Description
Advanced Floppy Disk Controller
Manufacturer
National Semiconductor Corporation
Datasheet

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6 0 Device Description
6 2 5 DMA Timing
Note 7 The active edge of RD or WR is recognized only when DACK is active
Note 8 Values shown are with the FIFO disabled or with FIFO enabled and THRESH
shown
Note 9 During normal DMA operation TC should occur when DACK is active during the last byte of the last sector transferred
Symbol
t
t
t
t
t
t
t
t
t
t
t
t
t
QP
QQ
KQ
RQ
QR
TT
TQ
KK
KI
KR
RK
QW
QT
DRQ Period (Except Non-Burst DMA) (Note 8)
DRQ Inactive Non-Burst Pulse Width
DACK Active Edge to DRQ Inactive
RD WR Active Edge to DRQ Inactive (Note 7)
DRQ to RD WR Active
TC Active Pulse Width
TC Active Edge to DRQ Inactive (Note 9)
DACK Active Pulse Width
DACK Inactive Pulse Width
DACK Setup to RD WR Active
DACK Hold from RD WR Inactive
DRQ to End of RD WR (Note 8)
(DRQ Service Time)
DRQ to TC Active (Note 8)
(DRQ Service Time)
(Continued)
Parameter
FIGURE 6-4 DMA Timing
43
e
0 For nonzero values of THRESH add (THRESH x 8 x t
8 x t
Min
300
15
50
65
25
5
0
DRP
b
b
(8 x t
(8 x t
16 x t
16 x t
Max
400
65
65
75
DRP
DRP
ICP
ICP
)
)
DRP
TL F 11332 – 19
) to the values
Units
ms
ms
ms
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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