pc8477b National Semiconductor Corporation, pc8477b Datasheet - Page 15
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pc8477b
Manufacturer Part Number
pc8477b
Description
Advanced Floppy Disk Controller
Manufacturer
National Semiconductor Corporation
Datasheet
1.PC8477B.pdf
(54 pages)
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4 0 Command Set Description
The following is a table of the PC8477B command set Each
command contains a unique first command byte called the
opcode byte which will identify to the controller how many
command bytes to expect If an invalid command byte is
issued to the controller it will immediately go into the Result
Phase and the status will be 80 (hex) which signifies Invalid
Command
4 1 COMMAND SET SUMMARY
CONFIGURE
Command Phase
Execution Phase Internal registers written
No Result Phase
DUMPREG
Command Phase
Execution Phase Internal registers read
Result Phase
Note Sectors per Track parameter returned if last command issued was
Format End of Track parameter returned if last command issued was Read
or Write
FORMAT TRACK
Command Phase
Execution Phase System transfers four ID bytes (track
head sector bytes sector) per sector to the floppy control-
ler via DMA or Non-DMA modes The entire track is format-
ted The data block in the Data Field of each sector is filled
with the data pattern byte
LOCK
X
0
0
0
0
0
0
Step Rate Time
MFM
EIS
0
0
EIS
X
0
0
Sectors per Track End of Track
FIFO
DC3
FIFO
0
0
X
Motor On Time
0
0
Sectors per Track
Bytes per Sector
Data Pattern
POLL
PTR Drive 0
PTR Drive 1
PTR Drive 2
PTR Drive 3
Format Gap
0
X
DC2
PRETRK
PRETRK
0
POLL
1
0
X
1
DC1
1
HD
1
0
0
Motor Off Time
DC0
1
THRESH
THRESH
0
0
DR1
0
GAP
1
1
0
DR0
DMA
WG
1
0
1
0
15
Result Phase
INVALID
Command Phase
Result Phase
LOCK
Command Phase
Execution Phase Internal register is written
Result Phase
MODE
Command Phase
Execution Phase Internal registers are written
No Result Phase
NSC
Command Phase
Result Phase
PERPENDICULAR MODE
Command Phase
Execution Phase Internal registers are written
No Result Phase
FWR
TMR
OW
LOCK
0
0
0
0
0
DENSEL
0
0
0
0
FRD
IAF
0
1
0
0
DC3
0
0
0
Status Register 0 (80 hex)
BFR
BST
IPS
0
1
0
0
0
Status Register 0
Status Register 1
Status Register 2
Invalid Op Codes
DC2
LOCK
1
R255
Undefined
Undefined
Undefined
Undefined
WLD
1
1
0
0
0
1
DC1
0
1
0
LOW PWR
0
0
0
0
0
DC0
0
Head Settle
0
0
1
0
RG
0
0
GAP
1
0
1
0
0
O
0
1
0
ETR
WG
PU
1
0
0
1
0
0
0