pc8477b National Semiconductor Corporation, pc8477b Datasheet - Page 7

• Manufacturer Part Number: pc8477b
• Description: Advanced Floppy Disk Controller
• Manufacturer: National Semiconductor Corporation

Symbol
HDSEL
HIFIL
IDENT
INDEX
INT
INVERT
LOFIL
MFM
MTR0
MTR1
MTR2
MTR3
NC
2 0 Pin Description
PLCC
Pin
51
38
27
26
23
35
37
48
57
61
63
66
42
43
44
47
(Note 1)
(Note 1)
(Note 1)
PQFP
Pin
21
60
57
18
27
31
33
35
1
9
I O
I O MFM During a chip reset when in PS 2 mode (IDENT low) this pin is sampled to select the PS 2
O
O
O
I
I
I
Head Select This output determines which side of the disk drive is accessed Active selects side
1 inactive selects side 0
High Filter No connect No external capacitor is required An external capacitor can be
connected but it will have no effect on the data separator performance
Identity During chip reset the IDENT and MFM pins are sampled to determine the mode of
operation according to the following table
AT Mode The DMA enable bit in the DOR is valid TC is active high Status Registers A and B
are disabled (TRI-STATE )
Model 30 Mode The DMA enable bit in the DOR is valid TC is active high Status Registers A
and B are enabled
PS 2 Mode The DMA enable bit in the DOR is a don’t care and the DRQ and INT signals will
always be enabled TC is active low Status Registers A and B are enabled
After chip reset the state of IDENT determines the polarity of the DENSEL output
When IDENT is a logic ‘‘1’’ DENSEL is active high for 500 kb s and 1 Mb s data rates
When IDENT is a logic ‘‘0’’ DENSEL is active low for 500 kb s and 1 Mb s data rates
(See Mode command for further explanation of DENSEL )
Index This input signals the beginning of a track
Interrupt Active high output to signal the completion of the execution phase for certain
commands Also used to signal when a data transfer is ready during a Non-DMA operation When
in PC-AT or Model 30 mode this signal is enabled by bit D3 of the DOR When in PS 2 mode INT
is always enabled and bit D3 of the DOR is reserved
Invert Determines the polarity of all disk interface signals When tied low the internal disk output
buffers and inverting Schmitt input receivers are enabled and the disk interface signals are active
low When tied high the disk interface signals are active high and external receivers and output
buffers are required
Low Filter No connect No external capacitor is required An external capacitor can be
connected but it will have no effect on the data separator performance
mode (MFM high) or the Model 30 mode (MFM low) An internal pull-up or external pull-down
10 kX resistor will select between the two PS 2 modes When the PC-AT mode is desired (IDENT
high) MFM should be left pulled high internally MFM reflects the current data encoding format
when RESET is inactive MFM
can also be configured as the PUMP data separator diagnostic output via the Mode command (see
Section 4 2 6)
Motor Select 0 – 3 These are the motor enable lines for drives 0 – 3 and are controlled by bits D7 –
D4 of the Digital Output register
No Connect These pins must be left unconnected
(Continued)
IDENT
1
0
1
0
e
7
high FM
e
Function
1 or NC
1 or NC
low Defaults to low after a chip reset This signal
MFM
0
0
Model 30 Mode
PC-AT Mode
PS 2 Mode
Mode
Illegal