s908ab32ag0cfue Freescale Semiconductor, Inc, s908ab32ag0cfue Datasheet - Page 235

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s908ab32ag0cfue

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s908ab32ag0cfue
Description
M68hc08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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14.8.1 ADC Status and Control Register (ADSCR)
MC68HC908AB32
Freescale Semiconductor
Rev. 1.1
Address:
Function of the ADC status and control register is described here.
COCO — Conversions Complete
AIEN — ADC Interrupt Enable Bit
ADCO — ADC Continuous Conversion Bit
Reset:
Read:
Write:
When the AIEN bit is a logic 0, the COCO is a read-only bit which is
set each time a conversion is completed except in the continuous
conversion mode where it is set after the first conversion. This bit is
cleared whenever the ADSCR is written or whenever the ADR is read.
If the AIEN bit is a logic 1, the COCO becomes a read/write bit, which
should be cleared to logic 0 for CPU to service the ADC interrupt
request. Reset clears the COCO bit.
When this bit is set, an interrupt is generated at the end of an ADC
conversion. The interrupt signal is cleared when the data register is
read or the status/control register is written.Reset clears the AIEN bit.
When set, the ADC will convert samples continuously and update the
ADR register at the end of each conversion. Only one conversion is
completed between writes to the ADSCR when this bit is cleared.
Reset clears the ADCO bit.
Figure 14-3. ADC Status and Control Register (ADSCR)
1 = Conversion completed (AIEN=0)
0 = Conversion not completed (AIEN=0)/CPU interrupt (AIEN=1)
1 = ADC interrupt enabled
0 = ADC interrupt disabled
1 = Continuous ADC conversion
0 = One ADC conversion
COCO
$0038
Bit 7
Analog-to-Digital Converter (ADC)
0
AIEN
6
0
ADCO
5
0
ADCH4
4
1
ADCH3
3
1
Analog-to-Digital Converter (ADC)
ADCH2
2
1
ADCH1
1
1
Technical Data
ADCH0
Bit 0
1
235

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