SSTUG32868 NXP Semiconductors, SSTUG32868 Datasheet - Page 4

• Manufacturer Part Number: SSTUG32868
• Description: Sstug32868 1.8 V 28-bit 1 2 Configurable Registered Buffer With Parity For Ddr2-1g Rdimm Applications
• Manufacturer: NXP Semiconductors

NXP Semiconductors
SSTUG32868_1
Product data sheet
Fig 2. Parity logic diagram (positive logic)
CSGEN
PAR_IN
RESET
DCS0
DCS1
DCS2
DCS3
VREF
Dn
(1) Register A configuration (C = 0): D1 to D5, D7, D9 to D12, D17 to D28
(2) Register A configuration (C = 0): Q1A to Q5A, Q7A, Q9A to Q12A, Q17A to Q28A
(3) Register A configuration (C = 0): Q1B to Q5B, Q7B, Q9B to Q12B, Q17B to Q28B
CK
CK
(1)
Register B configuration (C = 1): D1 to D12, D17 to D20, D22, D24 to D28
Register B configuration (C = 1): Q1A to Q12A, Q17A to Q20A, Q22A, Q24A to Q28A
Register B configuration (C = 1): Q1B to Q12B, Q17B to Q20B, Q22B, Q24B to Q28B
22
Rev. 01 — 23 April 2007
22
1.8 V DDR2-1G configurable registered buffer with parity
D
R
R
D
CLK
CLK
CE
CE
Q
Q
PARITY GENERATOR
ERROR CHECK
AND
22
D
R
D
R
CLK
CLK
SSTUG32868
22
Q
Q
© NXP B.V. 2007. All rights reserved.
22
22
002aac497
QnA
QnB
QERR
QCS0A
QCS0B
QCS1A
QCS1B
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(2)
(3)