SSTUG32868 NXP Semiconductors, SSTUG32868 Datasheet - Page 15

• Manufacturer Part Number: SSTUG32868
• Description: Sstug32868 1.8 V 28-bit 1 2 Configurable Registered Buffer With Parity For Ddr2-1g Rdimm Applications
• Manufacturer: NXP Semiconductors

NXP Semiconductors
SSTUG32868_1
Product data sheet
Fig 8. Timing diagram during shutdown (RESET switches from HIGH to LOW)
Qn, QODTn,
Dn, DODTn,
CSGEN
DCKEn
PAR_IN
(1) After RESET is switched from HIGH to LOW, all data and clock input signals must be held at valid logic levels (not floating)
DCSn
QCKEn
RESET
QERR
CK
CK
for a minimum time of t
(1)
(1)
(1)
(1)
(1)
(1)
INACT(max)
.
RESET to Q
Rev. 01 — 23 April 2007
t
PHL
1.8 V DDR2-1G configurable registered buffer with parity
HIGH, LOW, or Don't care
t
INACT
t
RESET to QERR
PLH
HIGH or LOW
SSTUG32868
© NXP B.V. 2007. All rights reserved.
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