isl6363 Intersil Corporation, isl6363 Datasheet - Page 3

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isl6363

Manufacturer Part Number
isl6363
Description
Multiphase Pwm Regulator For Vr12™ Desktop Cpus
Manufacturer
Intersil Corporation
Datasheet

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Part Number:
isl6363CRTZ
Manufacturer:
INTERSIL
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Pin Descriptions
19, 20, 21
ISL6363
28, 29
10
11
12
13
14
15
16
18
22
23
25
26
30
32
33
34
35
36
38
39
40
17
24
27
31
37
9
PSICOMP
VR_HOT#
PGOODG
ISUMPG,
SYMBOL
ALERT#,
PHASEG
PHASE2
ISUMNG
UGATEG
UGATE2
COMPG
LGATEG
VR_ON
IMONG
BOOTG
PVCCG
PWM4
PWM3
ISEN4
COMP
IMON
RTNG
VSEN
SCLK
NTCG
SDA,
VWG
RTN
NTC
FBG
VW
FB
VR1 phase 4 current sense input pin for phase current balancing.
VR1 remote core voltage sense input.
This pin is used for improving transient response in PS2/3 mode of VR1 by switching in an additional type 3 compensation
network to improve system gain and phase margin. Connect a resistor and capacitor from this pin to the output of VR1 near
the feedback compensation network.
VR1 remote voltage sensing return input. Connect this pin to the remote ground sensing location.
Inverting input of the error amplifier for VR1.
This is a dual function pin. This pin is the output of the error amplifier for VR1. A resistor connected from this pin to GND
programs IMAX for VR1 and V
A resistor from this pin to COMP programs the PWM switching frequency for VR1.
One of the thermistor network inputs to the thermal monitoring circuit used to control the VR_HOT# signal. Use this pin to
monitor the temperature of VR1. Place the NTC close to the desired thermal detection point on the PCB.
Current monitoring output pin for VR1. The current sense signal from ISUMN and ISUMP is output on this pin to generate a
voltage proportional to the output current of VR1.
Enable input signal for the controller. A high level logic signal on this pin enables the controller and initiates soft-start for VR1
and VR2.
Data, alert and clock signal for the SVID communication bus between the CPU and VR1 and VR2.
Power-good open-drain output indicating when VR2 is able to supply a regulated voltage. Pull-up externally with a 680Ω
resistor to +5V or 1.0kΩ to 3.3V.
Current monitoring output pin for VR2. The current sense signal from ISUMNG and ISUMPG is output on this pin to generate
a voltage proportional to the output current of VR2.
A resistor from this pin to COMPG programs the PWM switching frequency for VR1.
This is a dual function pin. This pin is the output of the error amplifier for VR2. A resistor connected from this pin to GND
programs IMAX for VR2 and TMAX for both VR1 and VR2. Refer to Table 8 on page 28.
Inverting input of the error amplifier for VR2.
VR2 remote voltage sensing return input. Connect this pin to the remote ground sensing location.
VR2 current sense input pin for current monitoring, droop current and overcurrent detection.
One of the thermistor network inputs to the thermal monitoring circuit used to control the VR_HOT# signal. Use this pin to
monitor the temperature of VR2. Place the NTC close to the desired thermal detection point on the PCB.
Open drain thermal overload output indicator.
Input voltage bias for the internal gate driver for VR2. Connect +12V to this pin. Decouple with at least a 1µF MLCC capacitor
and place it as close to the pin as possible.
Output of the VR2 low-side MOSFET gate driver. Connect this pin to the gate of the VR2 low-side MOSFET.
Connect a MLCC capacitor from this pin to the PHASEG pin. The boot capacitor is charged through an internal boot diode
connected from the PVCCG pin to the BOOTG pin.
Output of the VR2 high-side MOSFET gate drive. Connect this pin to the gate of the VR2 high-side MOSFET.
Current return path for the VR2 high-side MOSFET gate driver. Connect this pin to the node connecting the source of the
high-side MOSFET, the drain of the low-side MOSFET and the output inductor of VR2.
PWM output for phase 4 of VR1. When PWM4 is pulled to +5V VCC, the controller will disable phase 4 of VR1.
PWM output for phase 3 of VR1. When PWM3 is pulled to +5V VCC, the controller will disable phase 3 of VR1.
Current return path for the VR1 phase 2 high-side MOSFET gate driver. Connect this pin to the node connecting the source of
the high-side MOSFET, the drain of the low-side MOSFET and the output inductor of phase 2.
Output of the VR1 phase 2 high-side MOSFET gate drive. Connect this pin to the gate of the high-side MOSFET of phase 2.
3
(Continued)
BOOT
for both VR1 and VR2. Refer to Table 7 on page 28.
ISL6363
DESCRIPTION
September 29, 2011
FN6898.0

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