isl6363 Intersil Corporation, isl6363 Datasheet

no-image

isl6363

Manufacturer Part Number
isl6363
Description
Multiphase Pwm Regulator For Vr12™ Desktop Cpus
Manufacturer
Intersil Corporation
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
isl6363CRTZ
Manufacturer:
INTERSIL
Quantity:
20 000
Multiphase PWM Regulator for VR12™ Desktop CPUs
ISL6363
Fully compliant with VR12™ specifications, the ISL6363
provides a complete solution for microprocessor core and
graphics power supplies. It provides two Voltage Regulators
(VRs) with three integrated gate drivers. The first output (VR1)
can be configured as a 4, 3, 2 or 1-phase VR while the second
output (VR2) is a 1-phase VR. The two VRs share a serial control
bus to communicate with the CPU and achieve lower cost and
smaller board area compared with a two-chip approach.
Based on Intersil’s Robust Ripple Regulator R3 Technology™,
the PWM modulator, compared to traditional modulators, has
faster transient settling time, variable switching frequency
during load transients and has improved light load efficiency
with its ability to automatically change switching frequency.
The ISL6363 has several other key features. Both outputs
support DCR current sensing with a single NTC thermistor for
DCR temperature compensation or accurate resistor current
sensing. Both outputs come with remote voltage sensing,
programmable V
adjustable switching frequency, OC protection and separate
power-good indicators. To reduce output capacitors, the
ISL6363 also has an additional compensation function for
PS1/2 mode and high frequency load transient compensation.
September 29, 2011
FN6898.0
FIGURE 1. FAST TRANSIENT RESPONSE
BOOT
voltage, serial bus address, IMAX, TMAX,
2µs/DIV
1
65A STEP LOAD
50mV/DIV
1V/DIV
1V/DIV
V
COMP
CORE
Intersil (and design) and R3 Technology are trademarks owned by Intersil Corporation or one of its subsidiaries.
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774
Features
• Serial Data Bus (SVID)
• Dual Outputs:
• Precision Core Voltage Regulation
• PS2 Compensation and High Frequency Load Transient
• Differential Remote Voltage Sensing
• Lossless Inductor DCR Current Sensing
• Programmable V
• Resistor Programmable Address, IMAX, TMAX for Both
• Adaptive Body Diode Conduction Time Reduction
Applications
• VR12 Desktop Computers
Related Literature
• ISL6363EVAL1Z User Guide
- Configurable 4, 3, 2 or 1-phase for the 1st Output with 2
- 1-phase for the 2nd Output with Integrated Gate Driver
- 0.5% System Accuracy Over-Temperature
- Enhanced Load Line Accuracy
Compensation
Outputs
1.15
1.10
1.05
1.00
0.95
0.90
Integrated Gate Drivers
All other trademarks mentioned are the property of their respective owners.
0
FIGURE 2. ACCURATE LOADLINE, V
5 10 15 20 25 30 35 40 45 50 55 60 65 70 75 80 85
1.1V - PS1
|
Copyright Intersil Americas Inc. 2011. All Rights Reserved
BOOT
Voltage at Start-up
1.1V - PS0
1.7mΩ LOADLINE
I
OUT
(A)
CORE
vs I
OUT

Related parts for isl6363

isl6363 Summary of contents

Page 1

... The ISL6363 has several other key features. Both outputs support DCR current sensing with a single NTC thermistor for DCR temperature compensation or accurate resistor current sensing ...

Page 2

... RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 3. For Moisture Sensitivity Level (MSL), please see device information page for ISL6363. For more information on MSL please see techbrief TB363. Pin Configuration ...

Page 3

... MOSFET, the drain of the low-side MOSFET and the output inductor of phase 2. 40 UGATE2 Output of the VR1 phase 2 high-side MOSFET gate drive. Connect this pin to the gate of the high-side MOSFET of phase 2. 3 ISL6363 DESCRIPTION for both VR1 and VR2. Refer to Table 7 on page 28. BOOT FN6898.0 ...

Page 4

... Current return path for the VR1 phase 1 high-side MOSFET gate driver. Connect this pin to the node connecting the source of the high-side MOSFET, the drain of the low-side MOSFET and the output inductor of phase 1. 48 ADDR A resistor from this pin to GND programs the SVID address for VR1 and VR2. Refer to Table 9 on page 28. 4 ISL6363 DESCRIPTION FN6898.0 September 29, 2011 ...

Page 5

... SET (A/D) ADDR VR_ON SDA DIGITAL INTERFACE ALERT# SCLK VW COMP RTN FB PSICOMP CIRCUIT PSICOMP ISUMP + _ ISUMN ISEN4 ISEN3 CURRENT ISEN2 BALANCING ISEN1 VSEN 5 ISL6363 + Σ E/A _ VR2 MODULATOR IDROOPG CURRENT SENSE T_MONITOR COMPG COMP IMONG A/D IMON DAC2 D/A DAC1 MODE2 MODE MODE1 VREADY COMP + Σ ...

Page 6

... PHASEG LGATEG ISUMPG Rng o C Cng Rig Vsumng ISUMNG +12V VCC UGATE PVCC PHASE ISL6622 BOOT PWM4 PWM LGATE GND +12V ISL6363 VCC UGATE PVCC PHASE ISL6622 BOOT PWM3 PWM LGATE GND BOOT2 UGATE2 PHASE2 LGATE2 BOOT1 UGATE1 PHASE1 LGATE1 ISUMP Rn ...

Page 7

... Inductor DCR Current-Sensing Network . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Resistor Current-Sensing Network . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Overcurrent Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Compensator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Programming Resistors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 NTC Network on the NTC and the NTCG pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Current Monitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Current Balancing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Optional Slew Rate Compensation Circuit for 1-Tick VID Transition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Revision History Products . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 Package Outline Drawing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 7 ISL6363 FN6898.0 September 29, 2011 ...

Page 8

... PVCC and PVCCG Power-On-Reset Threshold SYSTEM AND REFERENCES System Accuracy Internal V BOOT 8 ISL6363 Thermal Information Thermal Resistance (Typical TQFN Package (Notes Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . .+150°C Maximum Storage Temperature Range . . . . . . . . . . . . . .-65°C to +150°C - VGND < +36V) Maximum Junction Temperature (Plastic Package .+150°C BOOT Storage Temperature Range .-65° ...

Page 9

... LGATE Turn-On Non-Overlap GATE DRIVE RESISTANCE Upper Drive Source Resistance Upper Drive Sink Resistance Lower Drive Source Resistance Lower Drive Sink Resistance BOOTSTRAP DIODE Forward Voltage Reverse Leakage 9 ISL6363 SYMBOL TEST CONDITIONS V VID = [11111111] CC_CORE(max) V VID = [00000001] CC_CORE(min) V Register 33h = 7Fh, VID = FFh ...

Page 10

... SLEW RATE (For VID Change) Fast Slew Rate Slow Slew Rate NOTE: 6. Compliance to datasheet limits is assured by one or more methods: production test, characterization and/or design. 10 ISL6363 SYMBOL TEST CONDITIONS OV VSEN rising above setpoint for >1µs H One ISEN above another ISEN for >1.2ms ...

Page 11

... VR2 is dedicated for 1-phase operation. The following description is based on VR1, but also applies to VR2 because the same architecture is implemented. The ISL6363 uses Intersil’s patented R3 (Robust Ripple Regulator) modulator. The R3 modulator combines the best features of fixed frequency PWM and hysteretic PWM while eliminating many of their shortcomings ...

Page 12

... PWM mode controllers. Unlike conventional hysteretic mode converters, the ISL6363 uses an error amplifier that allows the controller to maintain a 0.5% output voltage accuracy. Figure 5 shows the operation principles during load insertion response ...

Page 13

... Voltage Regulation and Load Line Implementation After the start sequence, the ISL6363 regulates the output voltage to the value set by the VID information per Table 1. The ISL6363 will control the no-load output voltage to an accuracy of ±0.5% over the range of 0.75V to 1.52V. A differential amplifier allows ...

Page 14

... ISL6363 HEX V ( 0.41000 0.41500 0.42000 0.42500 0.43000 ...

Page 15

... ISL6363 HEX V ( 0.81000 0.81500 0.82000 0.82500 0.83000 ...

Page 16

... As the load current increases from zero, the output voltage will D 9 1.33000 droop from the VID table value by an amount proportional to the load current to achieve the load line. The ISL6363 can sense the D A 1.33500 inductor current through the intrinsic DC Resistance (DCR) of the ...

Page 17

... I RTN VSS inductor average currents. SENSE VSS “CATCH” RESISTOR INTERNAL TO IC (EQ. 2) The ISL6363 will adjust the phase pulse-width relative to the other phases to make pcb1 Using the same components for L1, L2 and L3 will provide a good match of R ...

Page 18

... COMP and the VW pins sets the fset VW windows size, therefore sets the switching frequency. When the ISL6363 is in continuous conduction mode (CCM), the switching frequency is not absolutely constant due to the nature of the R3 modulator. As explained in the Multiphase R3 Modulator section on page 11, the effective switching frequency will increase during load insertion and will decrease during load release to achieve fast response ...

Page 19

... CCM 1 2 1-phase ISL6363 Table 3 shows VR2 operational modes, programmed by the PS command. VR2 operates in 1-phase CCM in PS0 and PS1, and enters 1-phase DE mode in PS2 and PS3 mode. OCP VR2 can be disabled completely by tying ISUMNG to 5V, and all THRESHOLD communication to VR2 will be blocked. ...

Page 20

... The controller will declare an overvoltage fault and de-assert PGOOD if the output voltage exceeds the VID set value by +200mV. The ISL6363 will immediately declare an OV fault, de-assert PGOOD, and turn on the low-side power MOSFETs. The low-side power MOSFETs remain on until the output voltage is pulled down below the VID set value when all power MOSFETs are turned off ...

Page 21

... VID value, then tri-state. CURRENT MONITOR The ISL6363 provides the current monitor function for both VRs. IMON pin reports VR1 inductor current and IMONG pins reports VR2 inductor current. Since they are designed following the same principle, the following discussion will be only based on the IMON pin but also applies to the IMONG pin ...

Page 22

... Vout max This register is programmed by the master and sets the maximum VID the VR will support higher VID code is received, the VR will respond with “not supported” acknowledge. 22 ISL6363 TABLE 6. SUPPORTED DATA AND CONFIGURATION REGISTERS (Continued) DEFAULT REGISTER VALUE INDEX NAME 81h ...

Page 23

... V (s) also needs to represent real-time I Cn achieve good transient response. Transfer function A pole w and a zero w . One needs to match w sns L 23 ISL6363 A (s) is unity gain at all frequencies. By forcing w cs value is much and solving for the solution, Equation 24 gives Cn value ----------------------------------------------------------- - = n ...

Page 24

... C greater than 2200pF. R n.2 usually is a few ohms and R n.1 n.2 determined through tuning the load transient response waveforms on an actual board. 24 ISL6363 R and C ip lower impedance path than R and C ip selection and V L 100Ω. C transient response waveforms on an actual board. The ...

Page 25

... I omax droopmax droop current. For example, given and I = 40.9µA, Equation 35 gives R droopmax 25 ISL6363 LOAD LINE SLOPE Refer to Figure 9. . Tables 2 (page 19) For inductor DCR sensing, substitution of Equation 29 into Equation 2 gives the load line slope expression: resistor. comp ...

Page 26

... T(1) is measured after the summing node, and T2(s) is measured in the voltage loop before the summing node. The spreadsheet gives both T1(s) and T2(s) plots. However, only T2(s) can be actually measured on an ISL6363 regulator ...

Page 27

FIGURE 26. SCREENSHOT OF THE COMPENSATOR DESIGN SPREADSHEET ...

Page 28

... Open Circuit 28 ISL6363 , R and prog1 prog2 RPROG2 (kΩ) based on V and BOOT or an BOOT 7.15 13.0 such that VR1 powers up 20.5 such prog1 27.4 , which by default BOOT 38.3 52.3 66.5 80.6 95.3 113 137 165 196 IMAX ...

Page 29

... The R is recommended to have a time constant long enough such that switching frequency ripples are removed. Current Balancing The ISL6363 achieves current balancing through matching the ISEN pin voltages. R switching ripple of the phase node voltages recommended to use a rather long R voltages have minimal ripple and represent the DC current flowing through the inductors ...

Page 30

... ⎜ ⎟ vid vid × × ----------- - = – ⎜ ⎟ vid vid dt ⎝ ⎠ 30 ISL6363 It is desired to let I dV × C ----------- - vid dt will follow the CORE and: × vid vid The result is expressed in Equation 47 vid and: cancels I . vid ...

Page 31

... For a complete listing of Applications, Related Documentation and Related Parts, please see the respective device information page on intersil.com: ISL6363 To report errors or suggestions for this datasheet, please go to FITs are available from our website at http://rel.intersil.com/reports/search.php 31 ISL6363 CHANGE www.intersil.com/askourstaff www.intersil.com/products for a FN6898.0 September 29, 2011 ...

Page 32

... Package Outline Drawing L48.6x6 48 LEAD THIN QUAD FLAT NO-LEAD PLASTIC PACKAGE Rev 1, 4/07 6.00 6 PIN 1 INDEX AREA (4X) 0.15 TOP VIEW ( 5. 75 TYP ) ( TYPICAL RECOMMENDED LAND PATTERN 32 ISL6363 48X 0.45 ± 0.10 BOTTOM VIEW MAX 0. SIDE VIEW REF ( 48X 48X DETAIL " ...

Related keywords