st10f273m STMicroelectronics, st10f273m Datasheet - Page 164

• Manufacturer Part Number: st10f273m
• Description: 16-bit Mcu With 512 Kbyte Flash Memory And 36 Kbyte Ram
• Manufacturer: STMicroelectronics

Electrical characteristics
24.8.17
Table 72.
164/182
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
Symbol
5
6
80
81
12
13
14
15
16
17
18
20
21
22
24
26
28
28h
38
CC ALE high time
CC Address setup to ALE
CC
CC
CC
CC
SR
SR
SR ALE low to valid data in
SR
SR
SR
SR
CC Data valid to WR
CC Data hold after WR
CC
CC
CC
CC
Address/Unlatched CS
setup to RD, WR
(with RW-delay)
Address/Unlatched CS
setup to RD, WR
(no RW-delay)
RD, WR low time
(with RW-delay)
RD, WR low time
(no RW-delay)
RD to valid data in
(with RW-delay)
RD to valid data in
(no RW-delay)
Address/Unlatched CS to
valid data in
Data hold after RD
rising edge
Data float after RD rising
edge (with RW-delay)
Data float after RD rising
edge (no RW-delay)
ALE rising edge after RD,
WR
Address/Unlatched CS
hold after RD, WR
Address/Unlatched CS
hold after WRH
ALE falling edge to
Latched CS
Demultiplexed bus
V
ALE cycle time = 4 TCL + 2t
Demultiplexed bus timings
DD
Parameter
= 5V ± 10%, V
(2)
(1)
(1)
SS
= 0V, T
12.5 + 2t
15.5 + t
0.5 + 2t
1.5 + t
-10 + t
28 + t
10 + t
-5 + t
4 + t
-4 - t
4 + t
0 + t
Min
–
–
–
–
0
–
–
A
f
TCL = 12.5ns
A
CPU
A
F
F
A
+ t
F
C
C
A
F
= -40 to +125°C, CL = 50pF,
A
C
A
C
= 40 MHz
+ t
17.5 + t
20 + 2t
F
18.5 + t
16.5 + t
(50ns at 40 MHz CPU clock without wait states).
6 + t
4 + t
6 - t
Max
–
–
–
–
–
–
–
–
–
–
–
–
A
A
A
C
F
+ t
+ t
C
F
C
C
2TCL - 12.5 + 2t
2TCL - 9.5 + t
3TCL - 9.5 + t
TCL - 12 + 2t
2TCL - 15 + t
TCL - 8.5 + t
TCL - 8.5 + t
TCL - 11 + t
-10 + t
-5 + t
-4 - t
0 + t
Min
1/2 TCL = 1 to 40 MHz
–
–
–
–
0
–
–
Variable CPU Clock
F
A
F
F
A
A
F
C
A
C
C
A
2TCL - 8.5 + t
4TCL - 30 + 2t
TCL - 8.5 + t
3TCL - 20 + t
2TCL - 19 + t
3TCL - 19 + t
6 - t
Max
–
–
–
–
–
–
–
–
–
–
–
–
A
ST10F273M
F
F
A
A
+ 2t
+ 2t
+ t
C
C
+ t
C
A
C
A
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns