st10f273m STMicroelectronics, st10f273m Datasheet - Page 111

• Manufacturer Part Number: st10f273m
• Description: 16-bit Mcu With 512 Kbyte Flash Memory And 36 Kbyte Ram
• Manufacturer: STMicroelectronics

ST10F273M
21.3.2
21.3.3
21.3.4
Exiting standby mode
After the system has entered the Standby mode, the procedure to exit this mode consists of
a standard Power-on sequence, with the only difference that the RAM is already powered
through V
It is recommended to held the device under RESET (RSTIN pin forced low) until external
V
device is maintained under reset by the internal low voltage detector circuit (implemented
inside the main voltage regulator) till the internal V
is no guaranty that the device stays under reset status if RSTIN is at high level during
power ramp up. So, it is important the external hardware is able to guarantee a stable
ground level on RSTIN along the power-on phase, without any temporary glitch.
The external hardware shall be responsible to drive low the RSTIN pin until the V
stable, even though the internal LVD is active.
Once the internal Reset signal goes low, the RAM (still frozen) power supply is switched to
the main V
At this time, everything becomes stable, and the execution of the initialization routines can
start: XRAM2EN bit can be set, enabling the RAM.
Real time clock and standby mode
When Standby mode is entered (turning off the main supply V
counting can be maintained running in case the on-chip 32 kHz oscillator is used to provide
the reference to the counter. This is not possible if the main oscillator is used as reference
for the counter: Being the main oscillator powered by V
oscillator is stopped.
Power reduction modes summary
The different Power reduction modes are summarized in the following
Table 45.
DD
Mode
voltage pin is stable. Even though, at the very beginning of the power-on phase, the
Idle
Warning:
18SB
18
.
Power reduction modes summary
internal reference (derived from V
on
on
During power-off phase, it is important that the external
hardware maintains a stable ground level on RSTIN pin,
without any glitch, in order to avoid spurious exiting from
reset status with unstable power supply.
on
on
off
off
on
on
STBY
18
off
on
becomes higher than about 1.0V, there
pin external voltage).
DD
, once this is switched off, the
run
run
DD
), the Real Time Clock
Power reduction modes
off
on
Table
biased
biased
45.
DD
is
biased
biased
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