74LV74PW,118 NXP Semiconductors, 74LV74PW,118 Datasheet - Page 17

• Manufacturer Part Number: 74LV74PW,118
• Description: IC DUAL D FF POSEDG TRIG 14TSSOP
• Manufacturer: NXP Semiconductors
• Series: 74LVr
• Type: D-Typer

Specifications of 74LV74PW,118

• Output Type: Differential
• Package / Case: 14-TSSOP
• Function: Set(Preset) and Reset
• Number Of Elements: 2
• Number Of Bits Per Element: 1
• Frequency - Clock: 56MHz
• Trigger Type: Positive Edge
• Current - Output High, Low: 12mA, 12mA
• Voltage - Supply: 1 V ~ 5.5 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Number Of Circuits: 2
• Logic Family: LV
• Logic Type: D-Type Edge Triggered Flip-Flop
• Polarity: Inverting/Non-Inverting
• Input Type: Single-Ended
• Propagation Delay Time: 11 ns at 3.3 V
• High Level Output Current: - 12 mA
• Low Level Output Current: 12 mA
• Supply Voltage (max): 5.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Supply Voltage (min): 1 V
• Delay Time - Propagation: -
• Technology: CMOS
• Number Of Bits: 2
• Number Of Elements: 2
• Clock-edge Trigger Type: Positive-Edge
• Operating Supply Voltage (typ): 3.3V
• Package Type: TSSOP
• Frequency (max): 56MHz
• Operating Supply Voltage (min): 1V
• Operating Supply Voltage (max): 5.5V
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 14
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Delay Time - Propagation: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 74LV74PW-T; 74LV74PW-T; 935175140118

NXP Semiconductors
13. Abbreviations
Table 11.
14. Revision history
Table 12.
74LV74_3
Product data sheet
Acronym
CMOS
ESD
HBM
MM
TTL
Document ID
74LV74_3
Modifications:
74LV74_2
74LV74_1
Abbreviations
Revision history
Description
Complementary Metal Oxide Semiconductor
ElectroStatic Discharge
Human Body Model
Machine Model
Transistor-Transistor Logic
Release date
20070928
19980420
19961107
•
•
•
•
•
The format of this data sheet has been redesigned to comply with the new identity guidelines
of NXP Semiconductors.
Legal texts have been adapted to the new company name when appropiate.
Section
Section
Section
3: DHVQFN14package added.
7: derating values added for DHVQFN14 package.
12: outline drawing added for DHVQFN14 package.
Rev. 03 — 28 September 2007
Data sheet status
Product data sheet
Product specification
Product specification
Dual D-type flip-flop with set and reset; positive edge-trigger
Change notice
-
-
-
Supersedes
74LV74_2
74LV74_1
-
© NXP B.V. 2007. All rights reserved.
74LV74
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