74LV74PW,118 NXP Semiconductors, 74LV74PW,118 Datasheet - Page 11

• Manufacturer Part Number: 74LV74PW,118
• Description: IC DUAL D FF POSEDG TRIG 14TSSOP
• Manufacturer: NXP Semiconductors
• Series: 74LVr
• Type: D-Typer

Specifications of 74LV74PW,118

• Output Type: Differential
• Package / Case: 14-TSSOP
• Function: Set(Preset) and Reset
• Number Of Elements: 2
• Number Of Bits Per Element: 1
• Frequency - Clock: 56MHz
• Trigger Type: Positive Edge
• Current - Output High, Low: 12mA, 12mA
• Voltage - Supply: 1 V ~ 5.5 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Number Of Circuits: 2
• Logic Family: LV
• Logic Type: D-Type Edge Triggered Flip-Flop
• Polarity: Inverting/Non-Inverting
• Input Type: Single-Ended
• Propagation Delay Time: 11 ns at 3.3 V
• High Level Output Current: - 12 mA
• Low Level Output Current: 12 mA
• Supply Voltage (max): 5.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Supply Voltage (min): 1 V
• Delay Time - Propagation: -
• Technology: CMOS
• Number Of Bits: 2
• Number Of Elements: 2
• Clock-edge Trigger Type: Positive-Edge
• Operating Supply Voltage (typ): 3.3V
• Package Type: TSSOP
• Frequency (max): 56MHz
• Operating Supply Voltage (min): 1V
• Operating Supply Voltage (max): 5.5V
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 14
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Delay Time - Propagation: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 74LV74PW-T; 74LV74PW-T; 935175140118

NXP Semiconductors
Table 10.
74LV74_3
Product data sheet
Supply voltage
V
< 2.7 V
2.7 V to 3.6 V
Fig 8. Load circuit for switching times
CC
4.5 V
Test data is given in
Definitions test circuit:
R
C
R
V
L
L
T
EXT
Test data
= Load resistance.
= Load capacitance including jig and probe capacitance.
= Termination resistance should be equal to the output impedance Z
= External voltage for measuring switching times.
Input
V
V
2.7 V
V
I
CC
CC
Table
10.
t
r
, t
2.5 ns
2.5 ns
2.5 ns
f
G
Rev. 03 — 28 September 2007
V
I
Load
C
50 pF
50 pF
50 pF
L
Dual D-type flip-flop with set and reset; positive edge-trigger
R T
DUT
V
CC
R
1 k
1 k
1 k
V
L
O
o
C L
of the pulse generator.
V
mna616
EXT
V
t
open
open
open
PHL
R L
R L
EXT
, t
PLH
t
GND
GND
GND
PZH
, t
PHZ
© NXP B.V. 2007. All rights reserved.
74LV74
t
2V
2V
2V
PZL
CC
CC
CC
, t
PLZ
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