LM3S6110 Luminary Micro, Inc, LM3S6110 Datasheet - Page 5

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LM3S6110

Manufacturer Part Number
LM3S6110
Description
Lm3s6110 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet

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10.3
10.4
10.5
11
11.1
11.2
11.2.1 Transmit/Receive Logic ........................................................................................................... 239
11.2.2 Baud-Rate Generation ............................................................................................................. 240
11.2.3 Data Transmission .................................................................................................................. 240
11.2.4 Serial IR (SIR) ......................................................................................................................... 241
11.2.5 FIFO Operation ....................................................................................................................... 242
11.2.6 Interrupts ................................................................................................................................ 242
11.2.7 Loopback Operation ................................................................................................................ 243
11.2.8 IrDA SIR block ........................................................................................................................ 243
11.3
11.4
11.5
12
12.1
12.2
12.2.1 Bit Rate Generation ................................................................................................................. 280
12.2.2 FIFO Operation ....................................................................................................................... 280
12.2.3 Interrupts ................................................................................................................................ 280
12.2.4 Frame Formats ....................................................................................................................... 281
12.3
12.4
12.5
13
13.1
13.2
13.2.1 Internal MII Operation .............................................................................................................. 318
13.2.2 PHY Configuration/Operation ................................................................................................... 318
13.2.3 MAC Configuration/Operation .................................................................................................. 319
13.2.4 Interrupts ................................................................................................................................ 321
13.3
13.4
13.5
13.6
14
14.1
14.2
14.2.1 Internal Reference Programming .............................................................................................. 363
14.3
14.4
14.5
15
15.1
July 25, 2008
Initialization and Configuration ................................................................................................. 216
Register Map .......................................................................................................................... 216
Register Descriptions .............................................................................................................. 217
Universal Asynchronous Receivers/Transmitters (UARTs) ......................................... 238
Block Diagram ........................................................................................................................ 239
Functional Description ............................................................................................................. 239
Initialization and Configuration ................................................................................................. 243
Register Map .......................................................................................................................... 244
Register Descriptions .............................................................................................................. 245
Synchronous Serial Interface (SSI) ................................................................................ 279
Block Diagram ........................................................................................................................ 279
Functional Description ............................................................................................................. 279
Initialization and Configuration ................................................................................................. 288
Register Map .......................................................................................................................... 289
Register Descriptions .............................................................................................................. 290
Ethernet Controller .......................................................................................................... 316
Block Diagram ........................................................................................................................ 317
Functional Description ............................................................................................................. 317
Initialization and Configuration ................................................................................................. 322
Ethernet Register Map ............................................................................................................. 323
Ethernet MAC Register Descriptions ......................................................................................... 324
MII Management Register Descriptions ..................................................................................... 341
Analog Comparators ....................................................................................................... 360
Block Diagram ........................................................................................................................ 361
Functional Description ............................................................................................................. 361
Initialization and Configuration ................................................................................................. 364
Register Map .......................................................................................................................... 364
Register Descriptions .............................................................................................................. 365
Pulse Width Modulator (PWM) ........................................................................................ 373
Block Diagram ........................................................................................................................ 373
Preliminary
LM3S6110 Microcontroller
5

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