LM3S6110 Luminary Micro, Inc, LM3S6110 Datasheet - Page 407
LM3S6110
Manufacturer Part Number
LM3S6110
Description
Lm3s6110 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet
1.LM3S6110.pdf
(472 pages)
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Reset
Reset
Type
Type
PWM0 Dead-Band Falling-Edge-Delay (PWM0DBFALL)
Base 0x4002.8000
Offset 0x070
Type R/W, reset 0x0000.0000
July 25, 2008
Bit/Field
31:12
11:0
RO
RO
31
15
0
0
Register 22: PWM0 Dead-Band Falling-Edge-Delay (PWM0DBFALL), offset
0x070
The PWM0DBFALL register contains the number of clock ticks to delay the falling edge of the
PWM0A signal when generating the PWM1 signal. If the dead-band generator is disabled, this register
is ignored. If the value of this register is larger than the width of a Low pulse on the input PWM
signal, the falling-edge delay consumes the entire Low time of the signal, resulting in no Low time
on the output. Care must be taken to ensure that the input Low time always exceeds the falling-edge
delay.
RO
RO
30
14
0
0
reserved
FallDelay
reserved
RO
RO
29
13
0
0
Name
RO
RO
28
12
0
0
R/W
RO
27
11
0
0
Type
R/W
RO
R/W
RO
26
10
0
0
Reset
0x00
0x00
R/W
RO
25
0
9
0
Preliminary
R/W
RO
24
0
8
0
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
Dead-Band Fall Delay
The number of clock ticks to delay the falling edge.
reserved
R/W
RO
23
0
7
0
R/W
RO
22
0
6
0
FallDelay
R/W
RO
21
0
5
0
R/W
RO
20
0
4
0
LM3S6110 Microcontroller
R/W
RO
19
0
3
0
R/W
RO
18
0
2
0
R/W
RO
17
0
1
0
R/W
RO
16
0
0
0
407
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