LM3S6110 Luminary Micro, Inc, LM3S6110 Datasheet - Page 414

• Manufacturer Part Number: LM3S6110
• Description: Lm3s6110 Arm Microcontroller
• Manufacturer: Luminary Micro, Inc

Signal Tables
414
Table 17-2. Signals by Signal Name
Pin Number
100
96
97
98
99
Pin Name
ERBIAS
CMOD0
CMOD1
Fault
CCP0
CCP1
CCP2
CCP3
C0+
C0-
C0o
C1+
C1-
C2+
C2-
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
Pin Name
GNDA
VDDA
PD5
PD6
PD7
C0o
Pin Number
100
90
92
24
91
23
22
66
34
67
95
65
76
41
71
15
21
33
39
45
54
57
63
69
82
9
Preliminary
Pin Type
Pin Type
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
O
-
-
-
-
-
-
-
-
-
-
-
-
-
I
I
I
I
I
I
I
I
Buffer Type
Buffer Type
Analog
Analog
Analog
Analog
Analog
Analog
Analog
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
Description
GPIO port D bit 5
The ground reference for the analog circuits
(ADC, Analog Comparators, etc.). These are
separated from GND to minimize the electrical
noise contained on VDD from affecting the
analog functions.
The positive supply (3.3 V) for the analog
circuits (ADC, Analog Comparators, etc.).
These are separated from VDD to minimize
the electrical noise contained on VDD from
affecting the analog functions.
GPIO port D bit 6
GPIO port D bit 7
Analog comparator 0 output
Description
Analog comparator 0 positive input
Analog comparator 0 negative input
Analog comparator 0 output
Analog comparator positive input
Analog comparator 1 negative input
Analog comparator positive input
Analog comparator 2 negative input
Capture/Compare/PWM 0
Capture/Compare/PWM 1
Capture/Compare/PWM 2
Capture/Compare/PWM 3
CPU Mode bit 0. Input must be set to logic 0
(grounded); other encodings reserved.
CPU Mode bit 1. Input must be set to logic 0
(grounded); other encodings reserved.
12.4 KOhm resistor (1% precision) used
internally for Ethernet PHY.
PWM Fault
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
July 25, 2008