LM3S6110 Luminary Micro, Inc, LM3S6110 Datasheet - Page 397

• Manufacturer Part Number: LM3S6110
• Description: Lm3s6110 Arm Microcontroller
• Manufacturer: Luminary Micro, Inc

Reset
Reset
Type
Type
PWM0 Compare A (PWM0CMPA)
Base 0x4002.8000
Offset 0x058
Type R/W, reset 0x0000.0000
July 25, 2008
Bit/Field
31:16
15:0
R/W
RO
31
15
0
0
R/W
Register 16: PWM0 Compare A (PWM0CMPA), offset 0x058
This register contains a value to be compared against the counter . When this value matches the
counter, a pulse is output; this can drive the generation of a PWM signal (via the
PWMnGENA/PWMnGENB registers) or drive an interrupt (via the PWMnINTEN register). If the
value of this register is greater than the PWMnLOAD register (see page 395), then no pulse is ever
output.
If the comparator A update mode is immediate (based on the CmpAUpd bit in the PWMnCTL register),
this 16-bit CompA value is used the next time the counter reaches zero. If the update mode is
synchronous, it is used the next time the counter reaches zero after a synchronous update has been
requested through the PWM Master Control (PWMCTL) register (see page 380). If this register is
rewritten before the actual update occurs, the previous value is never used and is lost.
RO
30
14
0
0
R/W
reserved
RO
29
13
CompA
0
0
Name
R/W
RO
28
12
0
0
R/W
RO
27
11
0
0
Type
R/W
RO
R/W
RO
26
10
0
0
Reset
0x00
0x00
R/W
RO
25
0
9
0
Preliminary
R/W
RO
24
0
8
0
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
Comparator A Value
The value to be compared against the counter.
reserved
CompA
R/W
RO
23
0
7
0
R/W
RO
22
0
6
0
R/W
RO
21
0
5
0
R/W
RO
20
0
4
0
LM3S6110 Microcontroller
R/W
RO
19
0
3
0
R/W
RO
18
0
2
0
R/W
RO
17
0
1
0
R/W
RO
16
0
0
0
397