XC3S250E Xilinx, Inc., XC3S250E Datasheet - Page 132

• Manufacturer Part Number: XC3S250E
• Description: Spartan-3E FPGA Family
• Manufacturer: Xilinx, Inc.

Table 10: CP132 Package Pinout
DS312-4 (v1.1) March 21, 2005
Advance Product Specification
Bank
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
3
3
3
IO/M1
IO/VREF_2
IO_L01N_2/INIT_B
IO_L01P_2/CSO_B
IO_L02N_2/MOSI/CSI_B
IO_L02P_2/DOUT/BUSY
IO_L03N_2/D6/GCLK13
IO_L03P_2/D7/GCLK12
IO_L04N_2/D3/GCLK15
IO_L04P_2/D4/GCLK14
IO_L06N_2/D1/GCLK3
IO_L06P_2/D2/GCLK2
IO_L07N_2/DIN/D0
IO_L07P_2/M0
IO_L08N_2/A22
IO_L08P_2/A23
IO_L09N_2/A20
IO_L09P_2/A21
IO_L10N_2/VS1/A18
IO_L10P_2/VS2/A19
IO_L11N_2/CCLK
IO_L11P_2/VS0/A17
IP/VREF_2
IP_L05N_2/M2/GCLK1
IP_L05P_2/RDWR_B/
GCLK0
VCCO_2
VCCO_2
IO
IO/VREF_3
IO_L01N_3
R
XC3S250E
XC3S500E
Pin Name
CP132
Ball
M10
N10
M11
N12
P11
N11
P12
N1
M2
M4
M5
M9
M6
M8
N7
N2
P1
N4
N5
P7
P6
N8
P8
N9
N3
N6
P3
K3
B1
J3
DUAL/
DUAL/
DUAL/
DUAL/
DUAL/
DUAL/
DUAL/
DUAL/
VCCO
VCCO
GCLK
GCLK
GCLK
GCLK
GCLK
GCLK
GCLK
GCLK
DUAL
VREF
DUAL
DUAL
DUAL
DUAL
DUAL
DUAL
DUAL
DUAL
DUAL
DUAL
DUAL
DUAL
DUAL
DUAL
VREF
VREF
Type
I/O
I/O
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Table 10: CP132 Package Pinout
Bank
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
IO_L01P_3
IO_L02N_3
IO_L02P_3
IO_L03N_3
IO_L03P_3
IO_L04N_3/LHCLK1
IO_L04P_3/LHCLK0
IO_L05N_3/LHCLK3/IRDY2
IO_L05P_3/LHCLK2
IO_L06N_3/LHCLK5
IO_L06P_3/LHCLK4/TRDY2
IO_L07N_3/LHCLK7
IO_L07P_3/LHCLK6
IO_L08N_3
IO_L08P_3
IO_L09N_3
IO_L09P_3
IP/VREF_3
VCCO_3
VCCO_3
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
XC3S250E
XC3S500E
Pin Name
Pinout Descriptions
CP132
Ball
C10
H14
E14
K12
C2
C3
D1
D2
G1
H1
G3
H3
H2
M1
C1
C7
G2
M3
M7
B2
F2
F3
F1
E2
E1
A4
A8
E3
P5
L2
L1
L3
J2
J1
LHCLK
LHCLK
LHCLK
LHCLK
LHCLK
LHCLK
LHCLK
LHCLK
VCCO
VCCO
VREF
Type
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
11